Input/output buffer for protecting a circuit from signals received from external devices
View Patent ↗An input/output buffer that protects a circuit from voltage signals provided from an external device. The input/output buffer includes a reference power generation circuit connected to a high voltage power supply and a low voltage power supply to convert the voltage of an external voltage signal and generate reference power. The reference power generation circuit has a protection circuit including a plurality of MOS transistors for decreasing the voltage of the external voltage signal to a predetermined voltage when the input/output buffer is not supplied with the voltage of the high voltage power supply. Each of the MOS transistors has a back gate connected to a predetermined node at which the voltage is less than the voltage of the high voltage power supply and greater than the voltage of the low voltage power supply.
1. An input/output buffer for receiving an external voltage signal via a resistor and a reference voltage signal, the input/output buffer comprising:
an input circuit including an n-channel MOS transistor and a comparator connected to the n-channel MOS transistor, the n-channel MOS transistor including:
a source for receiving the external voltage signal via the resistor;
a gate connected to the source; and
a drain for receiving reference power, the voltage of which is divided by a divisional resistor;
wherein the comparator compares the external voltage signal with the reference voltage signal to determine whether the voltage of the external voltage signal is greater than a predetermined threshold voltage from the comparison.
2. The input/output buffer according to claim 1 , wherein the input circuit further includes a reference circuit connected to the comparator which is provided with a Schmitt trigger function that varies the threshold voltage in accordance with the output of the comparator.
3. The input/output buffer according to claim 1 , wherein the input/output buffer is for use with a high voltage power supply and a low voltage power supply, the input/output buffer further comprising:
a reference power generation circuit connectable to the high voltage power supply and the low voltage power supply for converting the voltage of the external voltage signal and generating the reference power, wherein the reference power generation circuit has a protection circuit including a plurality of MOS transistors for decreasing the voltage of the external voltage signal to a predetermined voltage when the input/output buffer receives the external voltage signal and is not supplied with the voltage of the high voltage power supply, each of the MOS transistors having a back gate connected to a predetermined node at which the voltage is less than the voltage of the high voltage power supply and greater than the voltage of the low voltage power supply.
4. An input buffer for receiving an external voltage signal via a resistor and a reference voltage signal, the input buffer comprising:
an input circuit including an n-channel MOS transistor and a comparator connected to the n-channel MOS transistor, the n-channel MOS transistor including:
a source for receiving the external voltage signal via the resistor;
a gate connected to the source; and
a drain for receiving reference power, the voltage of which is divided by a divisional resistor;
wherein the comparator compares the external voltage signal with the reference voltage signal to determine whether the voltage of the external voltage signal is greater than a predetermined threshold voltage from the comparison.