IP Library Granted Patent US 7,304,365
Granted Patent B2
US 7,304,365 · App. 11/135,316 · Granted Dec 4, 2007

Semiconductor device and method of producing the same

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Quick Facts
Patent No.
US 7,304,365
App. No.
11/135,316
Granted
Dec 4, 2007
Kind
B2
Abstract

In a semiconductor device having element isolation made of a trench-type isolating oxide film 13 , large and small dummy patterns 11 of two types, being an active region of a dummy, are located in an isolating region 10 , the large dummy patterns 11 b are arranged at a position apart from actual patterns 9 , and the small dummy patterns 11 a are regularly arranged in a gap at around a periphery of the actual patterns 9 , whereby uniformity of an abrading rate is improved at a time of abrading an isolating oxide film 13 a is improved, and surface flatness of the semiconductor device becomes preferable.

Claims (22)

1. A semiconductor device comprising:

a semiconductor substrate;

an active device region formed on a principal surface of the semiconductor substrate;

an isolating region surrounding the active device region;

a plurality of first dummy patterns arranged regularly in rows and columns at a first pitch in the isolating region; and

a plurality of second dummy patterns arranged regularly in rows and columns at a second pitch in the isolating region,

wherein the second pitch is larger than the first pitch, and

wherein each of the second dummy patterns has a larger area than each of the first dummy patterns.

2. The semiconductor device according to claim 1 , the isolating region is made of an oxide film buried in a ditch formed on the principal surface of the semiconductor substrate.

3. The semiconductor device according to claim 2 , each of the first dummy patterns and each of the second dummy patterns are surrounded with the oxide film.

4. The semiconductor device according to claim 1 , the active device region is arranged in the vicinity of the first dummy patterns rather than the second dummy patterns.

5. A semiconductor device comprising:

a semiconductor substrate;

two active device regions formed on a principal surface of the semiconductor substrate;

an isolating region formed between two active device regions;

a plurality of first dummy patterns arranged regularly in rows and columns at a first pitch in the isolating region; and

a plurality of second dummy patterns arranged regularly in rows and columns at a second pitch in the isolating region;

wherein the second pitch is larger than the first pitch, and

wherein each of the second dummy patterns has a larger area than each of the first dummy patterns.

6. The semiconductor device according to claim 5 , the isolating region is made of an oxide film buried in a ditch formed on the principal surface of the semiconductor substrate.

7. The semiconductor device according to claim 6 ,

wherein each of the first dummy patterns and each of the second dummy patterns are surrounded with the oxide film.

Assignments (3)
CHANGE OF ADDRESS Recorded Nov 29, 2017
From: RENESAS ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 044928/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE U.S. PATENT NUMBERS 7,305,365 AND 7,719,028 PREVIOUSLY RECORDED ON REEL 024964 FRAME 0820. ASSIGNOR(S) HEREBY CONFIRMS THE INCORRECTLY LISTED U.S. PATENT NOS. SHOULD BE 7,304,365 AND 7,719,078 RESPECTIVELY.. Recorded Oct 20, 2010
From: RENESAS TECHNOLOGY CORP.
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 025169/0067 →
CHANGE OF NAME Recorded Sep 10, 2010
From: RENESAS TECHNOLOGY CORP.
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 024964/0820 →