DC-DC CMOS converter
View Patent ↗A DC—DC CMOS converter including when the supply voltage is low, the current limit is automatically reduced to the maximum possible value that maintains the comparator operative, rather than simply switching off the converter.
1. A DC—DC CMOS converter comprising:
a power transistor with a source connected to a supply rail, a drain connected to a load cell and a gate connected to an output of a gate driver;
an excess-current protection circuit that includes
a reference current source in series with a reference resistor between the supply rail and ground to provide a reference current,
a current sense transistor with a source connected to the supply rail, a gate connected to the gate of the power transistor and a drain,
a differential amplifier comparing the voltage levels at the drain of the power transistor and at the drain of the current sense transistor, and having an output that delivers a current limit control signal,
a programmable current mirror arrangement that amplifies the reference current to a sense current through said current sense transistor,
a soft-start circuit with a current source and a capacitor connected in series between the supply rail and ground, and a control transistor connected between the reference current source and the reference resistor and having a gate connected to the interconnection node of the current source and capacitor,
and a soft-stop circuit that acts to reduce the voltage level at the gate of the control transistor in the soft-start circuit in response to a reduction of the sense current through said current sense transistor due to the supply voltage at the supply rail dropping below a normal operating level of the converter.
2. The converter of claim 1 , wherein the control transistor in the soft-start circuit is connected in series with a bipolar transistor the base of which is connected to a reference voltage source.
3. The converter of claim 1 , wherein the differential amplifier comprises a first transistor and a second transistor, the first and second transistors having their gates interconnected, the first transistor having its source connected to the drain of the current sense transistor and the second transistor having its source connected to the drain of the power transistor.
4. The converter of claim 3 , wherein the first transistor is connected as a current mirror with a diode-connected transistor the source of which is connected to the drain of the current sense transistor.