Linearity enhanced amplifier
An amplifier circuit according to one embodiment of the present invention comprises an amplifier transistor configured to amplify an input signal received at a terminal of the amplifier transistor, and a bias circuit having a bias transistor forming a current mirror with the amplifier transistor for stabilizing a bias operating point for the amplifier transistor, a buffer transistor coupled to the bias transistor and to the amplifier transistor, and a current source coupled to the buffer transistor and configured to generate a temperature-dependent current for injection into the buffer transistor. The buffer transistor improves linearity of the amplifier transistor by creating a predistortion of the input signal, and the current source injects the temperature-dependent current into the buffer transistor to adjust the extent of predistortion and to compensate for undesirable effects caused by variations in ambient conditions.
1 . An amplifier bias circuit for use with an amplifier transistor receiving an input signal, comprising:
a current buffer configured to provide DC bias control of the amplifier transistor and to improve linearity of the amplifier transistor by creating a predistortion of the input signal; and
a current source configured to generate a current for injection into the current buffer to adjust the extent of predistortion and to compensate for effects caused by variations in ambient conditions.
2 . The amplifier bias circuit of claim 1 , further comprising a bias transistor coupled with the amplifier transistor in a current mirror arrangement.
3 . The amplifier bias circuit of claim 2 , wherein the current buffer is configured to provide DC bias control of the amplifier transistor by producing a first base current for the bias transistor and a second base current for the amplifier transistor.
4 . The amplifier bias circuit of claim 2 , wherein a first base of the bias transistor is coupled to a second base of the amplifier transistor through first and second resistors, and a terminal of the buffer transistor is coupled to a circuit node between the first and second resistor.
5 . The amplifier bias circuit of claim 4 , wherein the first resistor is coupled to the first base and the second resistor is coupled to the second base, a resistance value of the first resistor being substantially larger than that of the second resistor.
6 . The amplifier bias circuit of claim 1 , wherein the current generated by the current source increases with decreasing ambient temperature.
7 . The amplifier bias circuit of claim 1 , wherein the current source comprises a proportional-to-absolute-temperature (PTAT) cell.
8 . The amplifier bias circuit of claim 7 , wherein the current source further comprises a mirror transistor and a current source transistor, the PTAT cell driving the mirror transistor and the mirror transistor controlling the current source transistor.
9 . The amplifier bias circuit of claim 1 , wherein the current source comprises a plurality of resistors, and wherein the current generated by the current source depends on ratios of the resistance values associated with the plurality of resistors.
10 . The amplifier bias circuit of claim 9 , wherein the current generated by the current source has a dependency on temperature, and a degree of the dependency can be changed by changing ratios of the resistance values associated with the plurality of resistors.
11 . An amplifier circuit, comprising:
an amplifier transistor configured to amplify an input signal received at a terminal of the amplifier transistor;
a bias transistor forming a current mirror with the amplifier transistor for stabilizing a bias operating point for the amplifier transistor;
a buffer transistor coupled to the bias transistor and to the amplifier transistor, and configured to provide base currents to the amplifier transistor and the bias transistor; and
a current source coupled to the buffer transistor and configured to generate a temperature dependent current for injection into the buffer transistor.
12 . The amplifier circuit of claim 11 , wherein the buffer transistor is configured to create a predistortion of the input signal that cancels a distortion generated by the amplifier transistor.
13 . The amplifier circuit of claim 11 , wherein the current source is configured to generate a temperature dependent current that adjusts the predistortion created by the buffer transistor.
14 . The amplifier circuit of claim 11 , further comprising a first resistor coupled to the bias transistor and a second resistor coupled to the first resistor and to the amplifier transistor, a resistance value of the first resistor being substantially larger than that of the second resistor.
15 . The amplifier circuit of claim 11 , wherein the current generated by the current source increases with decreasing ambient temperature.
16 . The amplifier circuit of claim 11 , wherein the current source comprises a proportional-to-absolute-temperature (PTAT) cell.
17 . The amplifier circuit of claim 16 , wherein the current source further comprises a mirror transistor and a current source transistor, the PTAT cell driving the mirror transistor and the mirror transistor controlling the current source transistor.
18 . The amplifier circuit of claim 11 , wherein the current source comprises a plurality of resistors, and wherein the current generated by the current source depends on ratios of the resistance values associated with the plurality of resistors.
19 . The amplifier circuit of claim 18 , wherein the current generated by the current source has a dependency on temperature, and a degree of the dependency can be changed by changing ratios of the resistance values associated with the plurality of resistors.
20 . A method for improving a linearity of an amplifier circuit including an amplifier transistor, comprising:
generating a reference current through a bias transistor coupled to the amplifier transistor in a current mirror arrangement;
generating first and second base currents using a buffer transistor coupled to the bias and amplifier transistors, the first base current being provided to the bias transistor and the second base current being provided to the amplifier transistor; and
generating a temperature-dependent current for injection into the buffer transistor to adjust a differential conductance associated with the buffer transistor.