IP Library Granted Patent US 7,268,333
Granted Patent B2
US 7,268,333 · App. 11/143,958 · Granted Sep 11, 2007

Imaging apparatus and a device for use therewith

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,268,333
App. No.
11/143,958
Granted
Sep 11, 2007
Kind
B2
Abstract

An imaging apparatus capable of suppressing deterioration of image qualities and output properties is provided having one or more output circuits in series and a buffer circuit 6 , and processing luminance signals from photodetectors to output image information, the buffer circuit performing impedance conversion on signals outputted from a final output circuit of the one or more output circuits, the final output circuit being a source follower circuit that has an active element and a current source circuit 5 which is inserted between a source terminal of the active element and a reference voltage terminal, wherein the current source circuit and the buffer circuit 6 are external to a solid-state image sensor 1 having the photodetectors, and a main part of the current source circuit 5 and a main part of the buffer circuit 6 are in a single package.

Claims (26)

1. An imaging apparatus having one or more output circuits in series and a buffer circuit, and processing luminance signals from photodetectors to output image information, the buffer circuit performing impedance conversion on signals outputted from a final output circuit of the one or more output circuits, the final output circuit being a source follower circuit that has an active element and a current source which is inserted between a source terminal of the active element and a reference voltage terminal, wherein

the current source and the buffer circuit are external to a solid-state image sensor having the photodetectors,

the current source includes a main part constituted by a first active element,

the buffer circuit includes a main part constituted by a second active element, and

the main part of the current source and the main part of the buffer circuit are in a single package.

2. An imaging apparatus according to claim 1 , wherein the first and second active elements are formed on a single semiconductor substrate that is external to the solid-state image sensor, the .semiconductor substrate being included in the package.

3. An imaging apparatus according to claim 2 , wherein the solid-state image sensor is included in the package, and is connected within the package to the semiconductor substrate.

4. An imaging apparatus according to claim 1 , wherein the first and second active elements are formed on two different semiconductor substrates that are external to the solid-state image sensor, the semiconductor substrates being included in the package and connected to each other within the package.

5. An imaging apparatus according to claim 4 , wherein the solid-state image sensor is included in the package, and is connected within the package to at least one of the semiconductor substrates.

6. An imaging apparatus according to claim 1 , wherein the current source includes: a resistive divider circuit operable to perform resistive division on a predetermined constant voltage, and output a divided voltage; a current source buffer circuit operable to lower an output impedance of the resistive divider circuit; and a common emitter transistor having a base electrode and a collector electrode, the base electrode being applied with a voltage outputted from the current source buffer circuit, and the collector electrode being connected to an output line of the solid-state image sensor, and the common emitter transistor constitutes the main part of the current source.

7. An imaging apparatus according to claim 6 , wherein the common emitter transistor is constituted by an NPN transistor, the current source buffer circuit includes an NPN transistor having a base electrode to which the divided voltage is applied, the second active element is constituted by an NPN transistor, and the three NPN transistors are formed on a single semiconductor substrate that is external to the solid-state image sensor, the semiconductor substrate being included in the package.

8. An imaging apparatus according to claim 6 , wherein the common emitter transistor is constituted by an NPN transistor, the current source buffer circuit includes an NPN transistor having a base electrode to which the divided voltage is applied, the second active element is constituted by a PNP transistor, and the two NPN transistors and the PNP transistor are formed on a single semiconductor substrate that is external to the solid-state image sensor, the semiconductor substrate being included in the package.

9. An imaging apparatus according to claim 6 , wherein the common emitter transistor is constituted by an NPN transistor, the current source buffer circuit includes a PNP transistor having a base electrode to which the divided voltage is applied, and the NPN transistor and the PNP transistor constitute the main part of the current source.

10. An imaging apparatus according to claim 1 , wherein the current source includes a junction field-effect transistor having a gate electrode, a source electrode, and a drain electrode, the gate electrode and source electrode being grounded, the drain electrode being connected to an output line of the solid-state image sensor, and the junction field-effect transistor constitutes the main part of the current source.

11. An imaging apparatus according to claim 10 , wherein the source electrode is grounded via a source resistance.

12. An imaging apparatus according to claim 11 , wherein the source resistance is set at a value so that a relation between a gate-source voltage and a drain current is unsusceptible to temperature change.

13. An imaging apparatus according to claim 1 , wherein a rated current for the first and second active elements is in a range of 1 mA to 20 mA, inclusive.

14. A device used in an imaging apparatus having one or more output circuits in series and a buffer circuit and processing luminance signals from photodetectors to output image information, the buffer circuit performing impedance conversion on signals outputted from a final output circuit of the one or more output circuits, the final output circuit being a source follower circuit that has an active element and a current source which is inserted between a source terminal of the active element and a reference voltage terminal, wherein

the current source includes a main part constituted by a first active element,

the buffer circuit includes a main part constituted by a second active element,

the current source and the buffer circuit are external to a solid-state image sensor having the photodetectors, and

the device is constituted by a single package including the main part of the current source and the main part of the buffer circuit.

15. A device according to claim 14 , wherein the first and second active elements are formed on a single semiconductor substrate that is external to the solid-state image sensor, the semiconductor substrate being included in the package.

16. A device according to claim 15 , wherein the solid-state image sensor is included in the package, and is connected within the package to the semiconductor substrate.

17. A device according to claim 14 , wherein the first and second active elements are formed on two different semiconductor substrates that are external to the solid-state image sensor, the semiconductor substrates being included in the package and connected to each other within the package.

18. A device according to claim 17 , wherein the solid-state image sensor is included in the package, and is connected within the package to at least one of the semiconductor substrates.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 26, 2014
From: PANASONIC CORPORATION
To: COLLABO INNOVATIONS, INC.
Reel/Frame 033021/0806 →
LIEN Recorded Jan 13, 2014
From: COLLABO INNOVATIONS, INC.
To: PANASONIC CORPORATION
Reel/Frame 031997/0445 →
CHANGE OF NAME Recorded Nov 20, 2008
From: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
To: PANASONIC CORPORATION
Reel/Frame 021930/0876 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 6, 2005
From: KOHNO, AKIYOSHI; KATO, YOSHIAKI; MATSUDA, YUJI
To: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
Reel/Frame 016624/0278 →