IP Library Granted Patent US 7,405,783
Granted Patent B2
US 7,405,783 · App. 11/146,011 · Granted Jul 29, 2008

Display apparatus comprising a light shielding pattern formed in an area below a connecting pattern of the drain electrode

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Quick Facts
Patent No.
US 7,405,783
App. No.
11/146,011
Granted
Jul 29, 2008
Kind
B2
Abstract

A display apparatus according to the present invention is provided with a gate line 2 formed on an insulating substrate, a source line 13 intersecting with the gate line 2 with an insulating film in between, a source electrode 6 connected to the source line 13 , a drain electrode 10 connected to a pixel electrode 9 , a semiconductor layer 4 formed below the source electrode 6 , the source line 13 , and the drain electrode 10 , a light-shielding pattern 12 configured below the semiconductor layer 4 lying below the source line 13 , and a backlight emitting lights from a light source to the surface of the insulating substrate opposite to where pixels are formed. In this configuration, leakage current arisen in the semiconductor layer lying below the source line, the extending pattern of the drain electrode, and so on can be suppressed.

Claims (16)

1. A display apparatus comprising;

a gate line driving a pixel electrode constituting pixels on an insulating substrate;

a source line intersecting with said gate line with an insulating film in between;

a source electrode connected to said source line;

a drain electrode located opposite to said source electrode above a gate electrode connected to said gate line, and connected to said pixel electrode;

an extending pattern from said drain electrode configured not above said gate electrode nor above said gate line, and connected to said pixel electrode;

a semiconductor layer formed below said source electrode, said source line, said drain electrode, and said extending pattern of said drain electrode;

a thin film transistor configured from said gate electrode, an insulating film, said source line, said drain electrode, and said semiconductor layer;

a backlight emitting lights from a light source to strike the surface of said insulating substrate opposite to where pixels are formed; and

a light shielding pattern configured in the same layer of said gate line and blocking the light from the backlight;

wherein said extending pattern from said drain electrode includes a connecting pattern connecting a connection between said drain electrode and said pixel electrode, and is configured narrower than a channel width of said thin film transistor, and

said light shielding pattern is formed below said semiconductor layer lying below said connecting pattern of said drain electrode, and is configured in an area blocking the light entering to only a part of the semiconductor layer below the connecting pattern of said drain electrode in the vicinity of said gate line or said gate electrode.

2. The display apparatus according to claim 1 ,

wherein the display apparatus is driven by synchronizing a frequency of adjusted lights from the backlight with a frequency of vertical signals.

3. The display apparatus according to claim 1 ,

wherein the semiconductor layer is formed directly on the insulating film, and a surface of the semiconductor layer contacting the insulating film is planar along its entire extent.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 26, 2007
From: ADVANCED DISPLAY INC.
To: MITSUBISHI ELECTRIC CORPORATION
Reel/Frame 020156/0083 →