Method and apparatus for reducing input supply ripple in a DC-DC switching converter
View Patent ↗A power system comprising a front end regulator coupled to an input supply voltage (Vin) and providing a regulated input supply voltage (Vbp). The front end regulator compares the input supply voltage (Vin) and the regulated input supply voltage (Vbp) and maintains a substantially constant voltage difference between the input supply voltage (Vin) and the regulated input supply voltage (Vbp) to thereby reduce ripple of the input supply voltage (Vin). A DC-DC switching mode power converter is operatively coupled to the front end regulator and receives the regulated input supply voltage (Vbp). The DC-DC switching mode power converter thereby provides a regulated output voltage (Vout).
1. A power system, comprising:
a front end regulator coupled to an input supply voltage (Vin) and for providing a regulated input supply voltage (Vbp) and maintaining a substantially constant voltage difference between the input supply voltage (Vin) and the regulated input supply voltage (Vbp) to thereby reduce ripple of the input supply voltage (Vin), the front end regulator comprising (1) an error amplifier for comparing the input supply voltage (Vin) and the regulated input supply voltage (Vbp) and producing an error signal used to modulate the voltage difference between the input supply voltage (Vin) and the regulated input supply voltage (Vbp) and (2) a MOS device operatively coupled to the error amplifier, the MOS device including a gate terminal for receiving the error signal, a source terminal coupled to the input supply voltage (Vin), and a drain terminal coupled to the regulated input supply voltage (Vbp); and
a DC-DC switching mode power converter operatively coupled to the front end regulator and receiving the regulated input supply voltage (Vbp), the DC-DC switching mode power converter providing a regulated output voltage (Vout).
2. The power system of claim 1 , wherein the front end regulator further comprises a low drop-out regulator.
3. The power system of claim 1 , wherein the MOS device further comprises a PMOS pass device.
4. The power system of claim 1 , further comprising a reference voltage with respect to the input supply voltage (Vin) coupled to an inverting input of the error amplifier.
5. A method for reducing ripple of a source input supply voltage (Vin) to a DC-DC switching mode power converter, comprising the steps of:
regulating the source input supply voltage (Vin) to provide a regulated input supply voltage (Vbp);
providing the regulated input supply voltage (Vbp) to the DC-DC switching mode power converter;
comparing the source input supply voltage (Vin) to the regulated input supply voltage (Vbp) and providing a corresponding error signal;
coupling the error signal to a gate terminal of a MOS pass device. coupling the input supply voltage (Vin) to a source terminal of the MOS pass device, and coupling the regulated input supply voltage (Vbp) to a drain terminal of the MOS pass device; and
modulating a voltage difference between the input supply voltage (Vin) and the regulated input supply voltage (Vbp) in accordance with the error signal.
6. The method of claim 5 , wherein the comparing step further comprises coupling the input supply voltage (Vin) and the regulated input supply voltage (Vbp) to respective input terminals of an error amplifier.
7. The method of claim 6 , wherein the comparing step further comprises coupling a reference voltage with respect to the input supply voltage (Vin) to an inverting input terminal of the error amplifier.