IP Library Granted Patent US 7,662,702
Granted Patent B2
US 7,662,702 · App. 11/146,564 · Granted Feb 16, 2010

Method for manufacturing a crystalline silicon layer

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Quick Facts
Patent No.
US 7,662,702
App. No.
11/146,564
Granted
Feb 16, 2010
Kind
B2
Abstract

A method of forming a crystalline silicon layer on a microrough face of a substrate by reducing the microroughness of the face and then performing a metal induced crystallization process on the face is disclosed.

Claims (30)

1. A method of forming a crystalline silicon layer on a face of a substrate, the face being microrough prior to forming the layer, comprising:

providing a substrate, wherein the substrate comprises at least one material selected from the group consisting of a ceramic material, glass, a glass-ceramic material, mullite, alumina, and silicon nitride, and wherein a microroughness of a face of the substrate is higher than 2 rad/μm;

depositing a layer of a dielectric on the face of the substrate by at least one method selected from the group consisting of spinning on the dielectric, flowing on the dielectric, and dipping on the dielectric, wherein a microroughness of a surface of the dielectric layer is less than 1 rad/μm;

depositing a metal on the surface of the dielectric layer;

oxidizing the metal;

depositing silicon on the metal;

annealing the metal and the silicon; and

removing the metal, whereby a crystalline silicon layer on the dielectric layer is obtained.

2. The method according to claim 1 , wherein the dielectric layer comprises a spin-on glass, SiO 2 , or an oxide other than SiO 2 .

3. The method according to claim 1 , further comprising:

epitaxially depositing a silicon layer on the face; and

constructing a solar cell from the substrate with crystalline silicon layer.

4. The method according to claim 3 , wherein the constructing of the solar cell comprises:

diffusing phosphor into the crystalline silicon layer;

passivating the crystalline silicon layer;

forming metal contacts with the crystalline silicon layer; and

electrically isolating portions of the crystalline silicon layer from each other.

5. The method according to claim 1 , wherein the crystalline silicon layer has grains larger than 5 μm.

6. The method according to claim 1 , wherein the crystalline silicon layer has no needle-like grains.

7. The method according to claim 1 , wherein the crystalline silicon layer has some grains 10 μm or larger in diameter.

8. The method according to claim 1 , further comprising:

epitaxially depositing a crystalline silicon layer; and

constructing a solar cell from the substrate with the crystalline silicon layer.

9. The method according to claim 8 , wherein the constructing of the solar cell comprises:

diffusing phosphor into the crystalline silicon layer;

passivating the crystalline silicon layer;

forming metal contacts with the crystalline silicon layer; and

electrically isolating portions of the crystalline silicon layer from each other.

10. The method of claim 1 , wherein a maximum deviation from an average level line exceeds 50 nm for the face of the substrate, the method further comprising macroflattening the face of the substrate, wherein macroflattening is conducted before depositing a layer of a dielectric on the face of the substrate.

11. The method of claim 1 , wherein the metal is aluminum.

Assignments (2)
"IMEC" IS AN ALTERNATIVE OFFICIAL NAME FOR "INTERUNIVERSITAIR MICROELEKTRONICA CENTRUM VZW" Recorded Apr 7, 2010
From: INTERUNIVERSITAIR MICROELEKTRONICA CENTRUM VZW
To: IMEC
Reel/Frame 024200/0675 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 30, 2005
From: GESTEL, DRIES ELS VICTOR VAN; BEAUCARNE, GUY
To: INTERUNIVERSITAIR MICROELEKTRONICA CENTRUM (IMEC)
Reel/Frame 016614/0792 →