IP Library Patent Application 11155053
Patent Application
App. No. 11/155,053

Anti-pop driver circuit

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Quick Facts
Patent No.
US None
App. No.
11/155,053
Abstract

An anti-pop driver circuit, which may be incorporated in an audio processing integrated circuit, includes a right channel driver module, a left channel driver module, a center channel driver module, and a control module. The right, left, and center channel driver modules are operably coupled to produce channel outputs in accordance with a channel control signals. The control module is operably coupled to detect power-up of the anti-pop driver circuit, and, when detected, it provides a first state of the center channel control signal to the center channel driver module such that the center channel output is in a high impedance state; provides the right channel control signal to the right channel driver module such the right channel output ramps up at a desired rate; provides the left channel control signal to the left channel driver module such the left channel output ramps up at the desired rate; and, when the right and left channel outputs have reached a desired level, provides a second state of the center channel control signal to the center channel driver module such that the center channel output is a reference potential for the right and left channel outputs.

Claims (79)

1 . An anti-pop driver circuit comprises:

a right channel driver module operably coupled to produce a right channel output in accordance with a right channel control signal;

a left channel driver module operably coupled to produce a left channel output in accordance with a left channel control signal;

a center channel driver module operably coupled to produce a center channel output in accordance with a center channel control signal; and

a control module operably coupled to:

detect power-up of the anti-pop driver circuit;

when the power-up of the anti-pop driver circuit is detected:

provide a first state of the center channel control signal to the center channel driver module such that the center channel output is in a high impedance state;

provide the right channel control signal to the right channel driver module such the right channel output ramps up at a desired rate;

provide the left channel control signal to the left channel driver module such the left channel output ramps up at the desired rate; and

when the right and left channel outputs have reached a desired level, provide a second state of the center channel control signal to the center channel driver module such that the center channel output is a DC bias potential for the right and left channel outputs.

2 . The anti-pop driver circuit of claim 1 , wherein the control module further functions to:

detect power down of the anti-pop driver circuit;

when the power down of the anti-pop driver circuit is detected:

provide the first state of the center channel control signal to the center channel driver module such that the center channel output is in the high impedance state;

provide a power down state of the right channel control signal to the right channel driver module such the right channel output ramps down at a power down desired rate;

provide a power down state of the left channel control signal to the left channel driver module such the left channel output ramps down at the power down desired rate; and

when the right and left channel outputs have reached a power down desired level, provide a disable state of the left and right channel control signals to the left and right channel driver modules such that the left and right channel outputs are disabled.

3 . The anti-pop driver circuit of claim 1 , wherein the center channel driver module comprises:

a multi-mode driver operable as a class AB amplifier in a first mode and operable as a class A amplifier in a second mode when the center channel control signal is in the second state; and

overload detection module operably coupled to detect an overloading of the multi-mode driver, wherein, when the overloading of the multi-mode driver is detected, the overload detection module places the multi-mode driver in the second mode and, when the overloading of the multi-mode driver is not detected, the overload detection module places the multi-mode driver in the first mode.

4 . The anti-pop driver circuit of claim 1 , wherein the right channel driver module comprises:

a digital to analog converter operably coupled to receive a digital representation of a right channel signal into an analog representation of the right channel signal; and

a driver operably coupled to drive the analog representation of the right channel signal as the right channel output, wherein the right channel control signal controls at least one of ramping up the digital representation of the right channel signal and ramping up of the driver.

5 . The anti-pop driver circuit of claim 1 , wherein the left channel driver module comprises:

a digital to analog converter operably coupled to receive a digital representation of a left channel signal into an analog representation of the left channel signal; and

a driver operably coupled to drive the analog representation of the left channel signal as the left channel output, wherein the left channel control signal controls at least one of ramping up the digital representation of the left channel signal and ramping up of the driver.

6 . An audio processing integrated circuit comprises:

processing module;

memory operably coupled to the processing module, wherein the memory at least temporarily stores operational instructions that cause the processing module to produce digital audio signals; and

an anti-pop driver circuit including:

a right channel driver module operably coupled to produce a right channel output in accordance with a right channel control signal;

a left channel driver module operably coupled to produce a left channel output in accordance with a left channel control signal; and

a center channel driver module operably coupled to produce a center channel output in accordance with a center channel control signal, wherein the memory further at least temporarily stores operational instructions that cause the processing module to:

detect power-up of the anti-pop driver circuit;

when the power-up of the anti-pop driver circuit is detected:

provide a first state of the center channel control signal to the center channel driver module such that the center channel output is in a high impedance state;

provide the right channel control signal to the right channel driver module such the right channel output ramps up at a desired rate;

provide the left channel control signal to the left channel driver module such the left channel output ramps up at the desired rate; and

when the right and left channel outputs have reached a desired level, provide a second state of the center channel control signal to the center channel driver module such that the center channel output is a reference potential for the right and left channel outputs.

7 . The audio processing integrated circuit of claim 6 , wherein the memory further at least temporarily stores operational instructions that cause the processing module to:

detect power down of the anti-pop driver circuit;

when the power down of the anti-pop driver circuit is detected:

provide the first state of the center channel control signal to the center channel driver module such that the center channel output is in the high impedance state;

provide a power down state of the right channel control signal to the right channel driver module such the right channel output ramps down at a power down desired rate;

provide a power down state of the left channel control signal to the left channel driver module such the left channel output ramps down at the power down desired rate; and

when the right and left channel outputs have reached a power down desired level, provide a disable state of the left and right channel control signals to the left and right channel driver modules such that the left and right channel outputs are disabled.

8 . The audio processing integrated circuit of claim 6 , wherein the center channel driver module comprises:

a multi-mode driver operable as a class AB amplifier in a first mode and operable as a class A amplifier in a second mode when the center channel control signal is in the second state; and

overload detection module operably coupled to detect an overloading of the multi-mode driver, wherein, when the overloading of the multi-mode driver is detected, the overload detection module places the multi-mode driver in the second mode and, when the overloading of the multi-mode driver is not detected, the overload detection module places the multi-mode driver in the first mode

9 . The audio processing integrated circuit of claim 6 , wherein the right channel driver module comprises:

a digital to analog converter operably coupled to receive a digital representation of a right channel signal into an analog representation of the right channel signal; and

a driver operably coupled to drive the analog representation of the right channel signal as the right channel output, wherein the right channel control signal controls at least one of ramping up the digital representation of the right channel signal and ramping up of the driver.

10 . The audio processing integrated circuit of claim 6 , wherein the left channel driver module comprises:

a digital to analog converter operably coupled to receive a digital representation of a left channel signal into an analog representation of the left channel signal; and

a driver operably coupled to drive the analog representation of the left channel signal as the left channel output, wherein the left channel control signal controls at least one of ramping up the digital representation of the left channel signal and ramping up of the driver.

11 . An anti-pop driver circuit comprises:

a plurality of channel driver modules operably coupled to produce a plurality of channel outputs in accordance with a channel driver control signal;

a reference driver module operably coupled to produce a channel reference output for the plurality of channel outputs in accordance with a reference driver control signal; and

a control module operably coupled to:

detect power-up of the anti-pop driver circuit;

when the power-up of the anti-pop driver circuit is detected:

provide a first state of the reference driver control signal to the reference driver module such that the channel reference output is in a high impedance state;

provide the channel driver control signal to the plurality of channel driver modules such that the plurality of channel outputs ramps up at a desired rate; and

when the plurality of channel outputs reach a desired level, provide a second state of the reference driver control signal to the reference driver module such that the channel reference output provides a reference potential for the plurality of channel outputs.

12 . The anti-pop driver circuit of claim 11 , wherein the control module further functions to:

detect power down of the anti-pop driver circuit;

when the power down of the anti-pop driver circuit is detected:

provide the first state of the reference driver control signal to the reference driver module such that the channel reference output is in the high impedance state;

provide a power down state of the channel driver control signal to the plurality of channel driver modules such the plurality of channel outputs ramps down at a power down desired rate; and

when the plurality of channel outputs have reached a power down desired level, provide a disable state of the channel driver control signal to the plurality of channel modules such that the plurality of channel outputs are disabled.

13 . The anti-pop driver circuit of claim 11 , wherein the plurality of channel driver modules comprises:

a right channel driver module operably coupled to produce a right channel output of the plurality of channel outputs based on a right channel signal; and

a left channel driver module operably coupled to produce a left channel output of the plurality of channel outputs based on a left channel signal.

14 . The anti-pop driver circuit of claim 11 , wherein the plurality of channel driver modules comprises:

a right front channel driver module operably coupled to produce a right front channel output of the plurality of channel outputs based on a right front channel signal;

a left front channel driver module operably coupled to produce a left front channel output of the plurality of channel outputs based on a left front channel signal;

a right rear channel driver module operably coupled to produce a right rear channel output of the plurality of channel outputs based on a right rear channel signal; and

a left rear channel driver module operably coupled to produce a left rear channel output of the plurality of channel outputs based on a left rear channel signal.

Assignments (12)
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNEE NAME PREVIOUSLY RECORDED AT REEL: 037354 FRAME: 0773. ASSIGNOR(S) HEREBY CONFIRMS THE PATENT RELEASE. Recorded Aug 15, 2016
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: SIGMATEL, LLC
Reel/Frame 039723/0777 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: SIGMATEL, INC.
Reel/Frame 037354/0734 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: SIGMATEL, INC.
Reel/Frame 037354/0773 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: SIGMATEL, INC.
Reel/Frame 037355/0838 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037356/0143 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037356/0553 →
SECURITY AGREEMENT Recorded May 13, 2010
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS COLLATERAL AGENT
Reel/Frame 024397/0001 →
SECURITY AGREEMENT Recorded May 10, 2010
From: SIGMATEL, LLC
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 024358/0439 →
SECURITY AGREEMENT Recorded Mar 16, 2010
From: SIGMATEL, LLC
To: CITIBANK, N.A.
Reel/Frame 024079/0406 →
SECURITY AGREEMENT Recorded Mar 15, 2010
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A.
Reel/Frame 024085/0001 →
SECURITY AGREEMENT Recorded Jul 9, 2008
From: SIGMATEL, INC.
To: CITIBANK, N.A.
Reel/Frame 021212/0372 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 17, 2005
From: FELDER, MATTHEW D.; DEFILIPPI, JEFFREY CARL
To: SIGMATEL, INC., A DELAWARE CORPORATION
Reel/Frame 016704/0889 →