Synchronous one-bit interface protocol or data structure
View Patent ↗Systems and methods provide for data transfer and transmission according to a synchronous one-bit interface protocol. A bit stream is generated including first data to be transferred or transmitted and second data from which a clock period used to encode the first data may be extracted. The bit stream is provided to a processor for decoding. In one embodiment, the bit stream includes a start segment or sequence, a data segment and a stop segment or sequence. A clock period is encoded into and is extracted from the start and/or stop sequences. The data segment is decoded on the basis of the clock period.
1. A method of transmitting data using a device that comprises one or more processors, one or more memories coupled to at least one of the processors, and one or more transmitters coupled to at least one of the processors, the method comprising:
storing first data in at least one of the memories; and
at least one of the processors executing instructions to cause one or more of the transmitters to emit information representing a bit stream, the bit stream comprising a distinct start sequence, first data segment, and end sequence;
wherein:
the first data segment comprises the first data encoded using the clock period;
a second data segment consists of the start sequence and the end sequence;
the second data segment comprises synchronization data and data related to the clock period;
the first data segment immediately follows the start sequence;
the end sequence immediately follows the first data segment;
the clock period is encoded into a pulse width of bits in the start sequence and the end sequence;
each bit of the bit stream is assigned a set clock period, the duration of the clock periods being identical for all bits in the bit stream;
the first data segment comprises at least one escape sequence;
the end sequence comprises a contiguous sequence of bits that is permitted to be transmitted only in the end sequence; and
encoding comprises inserting the at least one escape sequence into the first data segment in place of a pattern of bits in the first data the comprises the contiguous sequence of bits.
2. A computing device for transmitting data, the device comprising:
one or more processors;
one or more memories coupled to at least one of the processors;
one or more transmitters coupled to at least one of the processors; and
a computer-readable storage medium encoded with instructions that, when executed by at least one of the processors, cause the computing device to carry out a method that comprises
storing first data in at least one of the memories, and
causing one or more of the transmitters to emit information representing a bit stream, the bit stream comprising a distinct start sequence, first data segment, and end sequence;
wherein:
the first data segment comprises the first data encoded using the clock period;
a second data segment consists of the start sequence and the end sequence;
the second data segment comprises synchronization data and data related to the clock period;
the first data segment immediately follows the start sequence;
the end sequence immediately follows the first data segment;
the clock period is encoded into a pulse width of bits in the start sequence and the end sequence;
each bit of the bit stream is assigned a set clock period, the duration of the clock periods being identical for all bits in the bit stream;
the first data segment comprises at least one escape sequence;
the end sequence comprises a contiguous sequence of bits that is permitted to be transmitted only in the end sequence; and
encoding comprises inserting the at least one escape sequence into the first data segment in place of a pattern of bits in the first data the comprises the contiguous sequence of bits.
3. A computer-readable storage medium encoded with instructions that, when executed by one or more processors within a computing device that comprises one or more memories operatively coupled to at least one of the processors and one or more transmitters operatively coupled to at least one of the processors, cause the device to carry out a method of transmitting data that comprises:
storing first data in at least one of the memories; and
at least one of the processors executing instructions to cause one or more of the transmitters to emit information representing a bit stream, the bit stream comprising a distinct start sequence, first data segment, and end sequence;
wherein:
the first data segment comprises the first data encoded using the clock period;
a second data segment consists of the start sequence and the end sequence;
the second data segment comprises synchronization data and data related to the clock period;
the first data segment immediately follows the start sequence;
the end sequence immediately follows the first data segment;
the clock period is encoded into a pulse width of bits in the start sequence and the end sequence;
each bit of the bit stream is assigned a set clock period, the duration of the clock periods being identical for all bits in the bit stream;
the first data segment comprises at least one escape sequence;
the end sequence comprises a contiguous sequence of bits that is permitted to be transmitted only in the end sequence; and
encoding comprises inserting the at least one escape sequence into the first data segment in place of a pattern of bits in the first data the comprises the contiguous sequence of bits.