IP Library Granted Patent US 7,839,479
Granted Patent B2
US 7,839,479 · App. 11/159,111 · Granted Nov 23, 2010

Thin film transistor array substrate comprising a first insulating layer completely covering the dummy testing pad, display using the same, and fabrication method thereof

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Quick Facts
Patent No.
US 7,839,479
App. No.
11/159,111
Granted
Nov 23, 2010
Kind
B2
Abstract

A display and a method of manufacturing the same, including a substrate including an image displaying part comprising a plurality of pixels, a dummy testing pad, and a first insulating layer covering the dummy testing pad.

Claims (61)

1. A display, comprising:

a substrate, comprising:

an image displaying part comprising a plurality of pixels;

a dummy testing pad connected to a single signal line through a chip terminal, the chip terminal being connected to a first pixel through the signal line to provide a signal to drive the first pixel;

a first insulating layer completely covering the dummy testing pad;

a data driver to transmit a data signal to a data line of the image displaying part; and

a pad formed on the substrate and coupled with the data driver,

wherein the dummy testing pad comprises:

a dummy signal line coupled with the data line and the data driver; and

a testing pad connected to the dummy signal line.

2. The display of claim 1 , wherein each pixel comprises:

a light emitting device; and

a pixel circuit, coupled with the light emitting device and the data line of the image displaying part, comprising:

a thin film transistor;

a pixel electrode electrically connected to a source or a drain of the thin film transistor; and

a pixel definition insulating layer to define a pixel region on the pixel electrode.

3. The display of claim 2 , wherein the first insulating layer is formed of the pixel definition insulating layer.

4. The display of claim 1 , further comprising:

a plurality of pads formed on the substrate and respectively coupled with a plurality of data lines of the image displaying part through a plurality of corresponding signal lines.

5. The display of claim 1 , further comprising:

a scan driver to transmit a scan signal to a scan line of the image displaying part; and

the pad coupled with the scan driver.

6. The display of claim 1 , further comprising:

a power line to provide a voltage to the image displaying part; and

the pad coupled with the power line.

7. A thin film transistor (TFT) array substrate, comprising:

a thin film transistor array provided on the thin film transistor array substrate, the thin film transistor array comprising a plurality of data lines, a plurality of scan lines, and a thin film transistor;

a dummy testing pad connected to a single signal line through a chip terminal, the chip terminal being connected to the thin film transistor through the signal line to provide a signal to drive the thin film transistor, the signal line being a data line or a scan line;

a first insulating layer completely covering the dummy testing pad;

a data driver to transmit a data signal to the data line of the thin film transistor array; and

a pad formed on the thin film transistor array substrate and coupled with the data driver;

wherein the dummy testing pad comprises:

a dummy signal line coupled with the data line and the data driver; and

a testing pad connected to the dummy signal line.

8. The TFT array substrate of claim 7 , further comprising:

a plurality of pixels defined by the plurality of data lines and scan lines, each pixel comprising:

a thin film transistor;

a pixel electrode electrically connected to a source or a drain of the thin film transistor; and

a pixel definition insulating layer to define a pixel region on the pixel electrode.

9. The TFT array substrate of claim 8 , wherein the first insulating layer is formed of the pixel definition insulating layer.

10. The TFT array substrate of claim 7 , further comprising:

a plurality of first pads formed on the substrate and respectively coupled with the data lines via corresponding signal lines.

11. The TFT array substrate of claim 10 , wherein the testing pad is provided on each signal line.

12. A method of forming a display, comprising:

forming a plurality of pixels on a substrate;

forming a dummy testing pad connected to a single signal line through a chip terminal, the chip terminal being connected to a first pixel through the signal line;

performing a test using the dummy testing pad;

covering completely the dummy testing pad with a first insulating layer;

forming a light emitting device coupled with a pixel circuit of the first pixel;

forming a data driver to transmit a data signal to a data line of the plurality of pixels; and

forming a pad formed on the substrate to couple with the data driver;

wherein forming the dummy testing pad comprises:

forming a dummy signal line coupled with the data line and the data driver; and

forming a testing pad connected to the dummy signal line.

13. The method of claim 12 , further comprising:

forming a pixel electrode for each pixel; and

forming a pixel definition insulating layer to define a pixel region on the pixel electrode.

14. The method of claim 13 , wherein the first insulating layer is formed of the pixel definition insulating layer.

15. The method of claim 12 , wherein the forming the dummy testing pad further comprises:

forming a plurality of signal lines coupled with a plurality of corresponding data lines; and

forming the dummy testing pad on each signal line.

Assignments (3)
MERGER Recorded Aug 29, 2012
From: SAMSUNG MOBILE DISPLAY CO., LTD.
To: SAMSUNG DISPLAY CO., LTD.
Reel/Frame 028868/0425 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 15, 2008
From: SAMSUNG SDI CO., LTD.
To: SAMSUNG MOBILE DISPLAY CO., LTD.
Reel/Frame 022024/0026 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 22, 2005
From: CHOI, WOONG SIK
To: SAMSUNG SDI CO., LTD.
Reel/Frame 017023/0579 →