Auto-gain controlled digital phase-locked loop and method thereof

1. A digital phase-locked loop (PLL) system, comprising:

a phase detector coupled to an input signal and a clock signal for generating a phase difference signal indicating a phase difference between the input signal and the clock signal;

a first multiplier coupled to the phase detector for multiplying the phase difference signal by a first gain factor;

a second multiplier coupled to the phase detector for multiplying the phase difference signal by a second gain factor;

a digital loop filter coupled to the first multiplier and the second multiplier for providing an integral signal and a proportional signal according to outputs of the first multiplier and the second multiplier and for generating a control signal according to the integral signal and the proportional signal;

a digitally controlled oscillator coupled to the digital loop filter for generating the clock signal according to the control signal;

an auto-gain control (AGC) unit coupled to the first multiplier, the second multiplier, and the digital loop filter, the AGC unit comprising:

a first control unit for updating the first gain factor according to the integral signal; and

a second control unit for updating the second gain factor according to the proportional signal.

2. The digital PLL system of claim 1 , wherein the first control unit comprises:

a differentiator for differentiating the integral signal to generate a variation signal;

an absolute value calculator coupled to the differentiator for receiving the variation signal and generating an absolute variation signal representing an absolute value of the variation signal;

a multiplier coupled to the absolute value calculator for multiplying the absolute variation signal by a first preset value to generate a difference signal; and

an adder coupled to the multiplier for adding a second preset value to the difference signal to generate the first gain factor.

3. The digital PLL system of claim 2 , wherein the differentiator computes a difference between two successive values transmitted by the integral signal to form the variation signal.

4. The digital PLL system of claim 1 , wherein the second control unit comprises:

an average unit for averaging the proportional signal to generate an averaged signal;

an absolute value calculator coupled to the average unit for generating an absolute averaged signal representing an absolute value of the averaged signal;

a multiplier coupled to the absolute value calculator for multiplying the absolute averaged signal by a third preset value to generate a difference signal; and

an adder coupled to the multiplier for adding a fourth preset value to the difference signal to generate the second gain factor.

5. The digital PLL system of claim 4 , wherein the average unit is a finite impulse response (FIR) low pass filter.

6. The digital PLL system of claim 4 , wherein the average unit is an infinite impulse response (IIR) low pass filter.

7. The digital PLL system of claim 1 being applied to an optical disc drive.

8. A method for controlling a digital PLL system, comprising:

generating a phase difference signal according to an input signal and a clock signal;

multiplying the phase difference signal by a first gain factor through a first multiplier of the digital PLL system;

multiplying the phase difference signal by a second gain factor through a second multiplier of the digital PLL system;

performing digital loop filtering upon outputs of the first multiplier and the second multiplier for providing an integral signal and a proportional signal and for generating a control signal according to the integral signal and the proportional signal;

generating the clock signal according to the control signal through a digitally controlled oscillator of the digital PLL system;

updating the first gain factor according to the integral signal; and

updating the second gain factor according to the proportional signal.

9. The method of claim 8 , wherein the step of updating the first gain factor further comprises:

differentiating the integral signal to generate a variation signal;

generating an absolute variation signal representing an absolute value of the variation signal;

multiplying the absolute variation signal by a first preset value to generate a difference signal; and

updating the first gain factor by summing a second preset value and the difference signal.

10. The method of claim 9 , wherein step of differentiating the integral signal to generate the variation signal computes a difference between two successive values transmitted by the integral signal to form the variation signal.

11. The method of claim 8 , wherein the step of updating the second gain factor further comprises:

averaging the proportional signal to generate an averaged signal;

generating an absolute averaged signal representing an absolute value of the averaged signal;

multiplying the absolute averaged signal by a third preset value to generate a difference signal; and

updating the second gain factor by summing a fourth preset value and the difference signal.

12. The method of claim 11 , wherein the averaged signal is generated by performing an FIR low pass filtering on the proportional signal.

13. The method of claim 11 , wherein the averaged signal is generated by performing an IIR low pass filtering on the proportional signal.

14. The method of claim 8 , wherein the digital PLL system is applied to an optical disc drive.

15. A digital phase-locked loop (PLL) system, comprising:

a phase detector coupled to an input signal and a clock signal for generating a phase difference signal indicating a phase difference between the input signal and the clock signal;

a first multiplier coupled to the phase detector for multiplying the phase difference signal by a first gain factor;

a second multiplier coupled to the phase detector for multiplying the phase difference signal by a second gain factor;

a digital loop filter coupled to the first multiplier and the second multiplier for providing an integral signal and a proportional signal according to outputs of the first multiplier and the second multiplier and for generating a control signal according to the integral signal and the proportional signal;

a digitally controlled oscillator coupled to the digital loop filter for generating the clock signal according to the control signal;

an auto-gain control (AGC) unit coupled to the first multiplier the second multiplier, and the digital loop filter, the AGC unit comprising:

a first control unit for updating the first gain factor according to the integral signal; and

a second control unit for updating the second gain factor according to the phase difference signal.

16. The digital PLL system of claim 15 , wherein the first control unit comprises:

a differentiator for differentiating the integral signal to generate a variation signal;

an absolute value calculator coupled to the differentiator for receiving the variation signal and generating an absolute variation signal representing an absolute value of the variation signal;

a multiplier coupled to the absolute value calculator for multiplying the absolute variation signal by a first preset value to generate a difference signal; and

an adder coupled to the multiplier for adding a second preset value to the difference signal to generate the first gain factor.

17. The digital PLL system of claim 16 , wherein the differentiator computes a difference between two successive values transmitted by the integral signal to form the variation signal.

18. The digital PLL system of claim 15 , wherein the second control unit comprises:

an average unit for averaging the phase difference signal to generate an averaged signal;

an absolute value calculator coupled to the average unit for generating an absolute averaged signal representing an absolute value of the averaged signal;

a multiplier coupled to the absolute value calculator for multiplying the absolute averaged signal by a third preset value to generate a difference signal; and

an adder coupled to the multiplier for adding a fourth preset value to the difference signal to generate the second gain factor.

19. The digital PLL system of claim 18 , wherein the average unit is a FIR low pass filter.

20. The digital PLL system of claim 18 , wherein the average unit is an IIR low pass filter.

21. The digital PLL system of claim 15 being applied to an optical disc drive.

22. A method for controlling a digital PLL system, comprising:

generating a phase difference signal according to an input signal and a clock signal;

multiplying the phase difference signal by a first gain factor through a first multiplier of the digital PLL system;

multiplying the phase difference signal by a second gain factor through a second multiplier of the digital PLL system;

performing digital loop filtering upon outputs of the first multiplier and the second multiplier for providing an integral signal and a proportional signal and for generating a control signal according to the integral signal and the proportional signal;

generating the clock signal according to the control signal through a digitally controlled oscillator of the digital PLL system;

updating the first gain factor according to the integral signal; and

updating the second gain factor according to the phase difference signal.

23. The method of claim 22 , wherein the step of updating the first gain factor further comprises:

differentiating the integral signal to generate a variation signal;

generating an absolute variation signal representing an absolute value of the variation signal;

multiplying the absolute variation signal by a first preset value to generate a difference signal; and

updating the first gain factor by summing a second preset value and the difference signal.

24. The method of claim 23 , wherein step of differentiating the integral signal to generate the variation signal computes a difference between two successive values transmitted by the integral signal to form the variation signal.

25. The method of claim 22 , wherein the step of updating the second gain factor further comprises:

averaging the phase difference signal to generate an averaged signal;

generating an absolute averaged signal representing an absolute value of the averaged signal;

multiplying the absolute averaged signal by a third preset value to generate a difference signal; and

updating the second gain factor by summing a fourth preset value and the difference signal.

26. The method of claim 25 , wherein the averaged signal is generated by performing an FIR low pass filtering on the phase difference signal.

27. The method of claim 25 , wherein the averaged signal is generated by performing an IIR low pass filtering on the phase difference signal.

28. The method of claim 22 , wherein the digital PLL system is applied to an optical disc drive.