Pattern density control using edge printing processes

1. A structure fabrication method, comprising:

providing a design structure that includes (i) a design substrate and (ii) M design normal regions on the design substrate, wherein M is a positive integer greater than 1;

adding, in the design structure, N design sacrificial regions between two adjacent design normal regions of the M design normal regions, wherein N is a positive integer;

providing an actual structure that includes (i) an actual substrate corresponding to the design substrate, (ii) a to-be-etched layer on the actual substrate, and (iii) a memory layer on the to-be-etched layer; and

performing an edge printing process on the memory layer so as to form (a) M normal memory portions aligned with the M design normal regions and (b) N sacrificial memory portions aligned with the N design sacrificial regions.

2. The method of claim 1 , further comprising:

removing the N sacrificial memory portions; and then

using the M normal memory portions as a blocking mask to etch the to-be-etched layer so as to form M actual normal regions from the to-be-etched layer.

3. The method of claim 2 , further comprising physically separating the M normal memory portions from each other, wherein said removing the N sacrificial memory portions and said physically separating the M normal memory portions from each other are performed simultaneously using a single lithographic step.

4. The method of claim 1 , further comprising using the M normal memory portions and the N sacrificial memory portions as a blocking mask to etch the to-be-etched layer so as to form M actual normal regions and N actual sacrificial regions, respectively, from the to-be-etched layer.

5. The method of claim 1 , wherein the edge printing process involves a subtractive sidewall image transfer (SIT) process.

6. The method of claim 1 , wherein the edge printing process involves an additive SIT process.

7. The method of claim 1 , wherein the edge printing process involves a phase-shift process.

8. The method of claim 1 , wherein N is an odd number.

9. The method of claim 1 , wherein N is an even number.

10. The method of claim 1 , wherein the memory layer and the to-be-etched layer comprise polysilicon.

11. A structure fabrication method, comprising:

providing a design structure that includes (i) a design substrate and (ii) M design normal regions on the design substrate, wherein M is a positive integer greater than 1;

adding, in the design structure, N design sacrificial regions between two adjacent design normal regions of the M design normal regions, wherein N is a positive integer;

providing an actual structure that includes (i) an actual substrate corresponding to the design substrate, (ii) a to-be-etched layer on the actual substrate, and (iii) a memory layer on the to-be-etched layer;

performing an edge printing process on the memory layer so as to form (a) M normal memory portions aligned with the M design normal regions and (b) N sacrificial memory portions aligned with the N design sacrificial regions;

removing the N sacrificial memory portions; and then

using the M normal memory portions as a blocking mask to etch the to-be-etched layer so as to form M actual normal regions from the to-be-etched layer, wherein N is an odd number.

12. The method of claim 11 , further comprising physically separating the M normal memory portions from each other, wherein said removing the N sacrificial memory portions and said physically separating the M normal memory portions from each other are performed simultaneously using a single lithographic step.

13. The method of claim 11 , wherein the edge printing process involves a subtractive sidewall image transfer (SIT) process.

14. The method of claim 11 , wherein the edge printing process involves an additive SIT process.

15. The method of claim 11 , wherein the edge printing process involves a phase-shift process.

16. The method of claim 11 , wherein the memory layer and the to-be-etched layer comprise polysilicon.

17. A structure fabrication method, comprising:

providing a design structure that includes (i) a design substrate and (ii) M design normal regions on the design substrate, wherein M is a positive integer greater than 1;

adding, in the design structure, N design sacrificial regions between two adjacent design normal regions of the M design normal regions, wherein N is a positive integer;

providing an actual structure that includes (i) an actual substrate corresponding to the design substrate, (ii) a to-be-etched layer on the actual substrate, and (iii) a memory layer on the to-be-etched layer;

performing an edge printing process on the memory layer so as to form (a) M normal memory portions aligned with the M design normal regions and (b) N sacrificial memory portions aligned with the N design sacrificial regions; and then

using the M normal memory portions and the N sacrificial memory portions as a blocking mask to etch the to-be-etched layer so as to form M actual normal regions and N actual sacrificial regions, respectively, from the to-be-etched layer,

wherein N is an odd number.

18. The method of claim 17 , wherein the edge printing process involves a subtractive sidewall image transfer (SIT) process.

19. The method of claim 17 , wherein the edge printing process involves an additive SIT process.

20. The method of claim 17 , wherein the edge printing process involves a phase-shift process.