Array substrate for a liquid crystal display device with particular protection layers above link lines and fabricating method thereof

1. A fabricating method of an array substrate for a liquid crystal display device, comprising:

forming a plurality of gate electrodes, gate lines, gate link lines and first dummy patterns on a substrate, each gate electrode being connected to a respective gate line, and each gate link line being an extension of a respective gate line;

forming a first insulating layer on the gate electrodes, the gate lines, the gate link lines and the first dummy patterns;

forming a plurality of active layers and ohmic contact layers on the first insulating layer, each active layer and ohmic contact layer being disposed over a respective gate electrode;

forming a plurality of data lines, data link lines, and source and drain electrodes on the first insulating layer, the data lines crossing the gate lines to define a plurality of pixel regions, each data link line being an extension of a respective data line, the source and drain electrodes contacting the ohmic contact layer, and each first dummy pattern being disposed between adjacent data link lines;

forming a second insulating layer on the data lines, the data link lines, and the source and drain electrodes;

forming a pixel electrode at each pixel region, the pixel electrode contacting a respective drain electrode; and

forming a protection pattern over only a portion of the data link lines which is located adjacent to the first dummy pattern.

2. The method according to claim 1 , wherein a further protection pattern is formed over the gate link lines.

3. The method according to claim 2 , wherein the steps of forming the protection patterns are simultaneously performed with said step of forming the pixel electrode.

4. The method according to claim 3 , wherein the pixel electrode and the protection patterns are formed of a transparent conductive material including at least one of indium-tin-oxide (ITO) and indium-zinc-oxide (IZO).

5. The method according to claim 1 , further comprising:

forming gate pad at one end of each gate link line, and a data pad at one end of each data link line.

6. The method according to claim 5 , further comprising:

forming a plurality of gate pad terminals, each contacting a respective gate pad; and

forming a plurality of data pad terminals, each contacting a respective gate pad.

7. The method of claim 1 , further comprising:

forming a second dummy pattern on the first insulating layer, the second dummy pattern being spaced apart vertically from the first dummy pattern.

8. A fabricating method of an array substrate for a liquid crystal display device, comprising:

forming a plurality of gate electrodes, gate lines, gate link lines and first dummy patterns on a substrate, each gate electrode being connected to a respective gate line, and each gate link line being an extension of a respective gate line;

forming a first insulating layer on the gate electrodes, the gate lines, the gate link lines and the first dummy patterns;

forming a plurality of active layers and ohmic contact layers on the first insulating layer, each active layer and ohmic contact layer being disposed over a respective gate electrode;

forming a plurality of data lines, data link lines, and source and drain electrodes on the first insulating layer, the data lines crossing the gate lines to define a plurality of pixel regions, each data link line being an extension of a respective data line, the source and drain electrodes contacting the ohmic contact layer, and each first dummy pattern being disposed between adjacent data link lines;

forming a second insulating layer on the data lines, the data link lines, and the source and drain electrodes;

forming a pixel electrode at each pixel region, the pixel electrode contacting a respective drain electrode; and

forming a second dummy pattern on the first insulating layer, the second dummy pattern being disposed over the first dummy pattern.