IP Library Granted Patent US 7,236,388
Granted Patent B2
US 7,236,388 · App. 11/169,535 · Granted Jun 26, 2007

Driving method of variable resistance element and memory device

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Quick Facts
Patent No.
US 7,236,388
App. No.
11/169,535
Granted
Jun 26, 2007
Kind
B2
Abstract

A variable resistance element is configured to be provided with a perovskite-type oxide between a first electrode and a second electrode, of which electric resistance between the first electrode and the second electrode is changed by applying a voltage pulse of a predetermined polarity between the first electrode and the second electrode, and the variable resistance element has a resistance hysteresis characteristic, in which a changing rate of a resistance value is changed from positive to negative with respect to increase of a cumulative pulse applying time in the application of the voltage pulse. The voltage pulse is applied to the variable resistance element so that the cumulative pulse applying time is not longer than a specific cumulative pulse applying time, in which the changing rate of the, resistance value is changed from positive to negative with respect to increase of the cumulative pulse applying time in the resistance hysteresis characteristic.

Claims (24)

1. A driving method of a variable resistance element, the variable resistance element comprising a perovskite-type oxide between a first electrode and a second electrode, of which electric resistance between the first electrode and the second electrode is changed by applying a voltage pulse of a predetermined polarity between the first electrode and the second electrode, and having a resistance hysteresis characteristic, in which a changing rate of a resistance value is changed from positive to negative with respect to increase of a cumulative pulse applying time in the application of the voltage pulse;

wherein the driving method comprises applying the voltage pulse to the variable resistance element on the basis of the resistance hysteresis characteristic and so that the cumulative pulse applying time is not longer than a specific cumulative pulse applying time, on which the changing rate of the resistance value is changed from positive to negative with respect to increase of the cumulative pulse applying time in the resistance hysteresis characteristic.

2. The driving method of a variable resistance element according to claim 1 , wherein the specific cumulative pulse applying time is controlled by controlling the voltage amplitude of the voltage pulse.

3. The driving method of a variable resistance element according to claim 1 , wherein the resistance value of the variable resistance element after applying the voltage pulse is controlled by controlling the pulse applying time or the cumulative pulse applying time of the voltage pulse.

4. The driving method of a variable resistance element according to claim 1 , wherein the resistance value of the variable resistance element is changed reversibly in a positive area of the changing rate of the resistance value with respect to increase of the cumulative pulse applying time in the resistance hysteresis characteristic.

5. The driving method of a variable resistance element according to claim 1 , wherein the variable resistance element has the resistance hysteresis characteristic, in which the changing rate of the resistance value is changed from positive to negative with respect to increase of the cumulative pulse applying time in spite of a polarity of the voltage pulse to be applied between the first electrode and the second electrode.

6. The driving method of a variable resistance element according to claim 1 , wherein the perovskite-type oxide used for the variable resistance element is an oxide including at least one kind of element selected from among Pr, Ca, La, Sr, Gd, Nd, Bi, Ba, Y, Ce, Pb, Sm, and Dy and at least one kind of element selected from among Ta, Ti, Cu, Mn, Cr, Co, Fe, Ni, and Ga.

7. The driving method of a variable resistance element according to claim 6 , wherein the perovskite-type oxide is an oxide of any one group represented by a general formula (0.1 ≦x ≦1, 0≦z≦1), which is selected from among a Pr 1−x Ca x [Mn 1−z M z ]O 3 group (here, M is any element selected from among Ta, Ti, Cu, Cr, Co, Fe, Ni, and Ga); an La 1−x AE x MnO 3 group (here, AE is any divalent alkaline-earth metal selected from among Ca, Sr, Pb, and Ba); an RE 1−x Sr x MnO 3 group (here, RE is any trivalent rare-earth metal selected from among Sm, La, Pr, Nd, Gd, and Dy); La 1−x Co x [Mn 1−z Co z ]O 3 group; a Gd 1−x Ca x MnO 3 group; and an Nd 1−x Gd x MnO 3 group.

8. The driving method of a variable resistance element according to claim 1 , wherein the second electrode includes at least one kind of a single piece of noble metal of platinum group metal, an alloy based on the noble metal, an oxide conductive substance of any element selected from among Ir, Ru, Re, and Os; and an oxide conductive substance selected from among SRO (SrRuO 3 ), LSCO ((LaSr) CoO 3 ), YBCO (YbBa 2 Cu 3 O 7 ).

9. The driving method of a variable resistance element according to claim 1 , wherein the variable resistance element comprises a perovskite-type oxide film on the second electrode; and the first electrode includes at least one kind of a noble metal of platinum group metal, a single piece of metal or its alloy selected from among Ag, Al, Cu, Ni, Ti, and Ta, an oxide conductive substance of any element selected-from among Ir, Ru, Re, and Os; and an oxide conductive substance selected from among SRO (SrRuO 3 ), LSCO ((LaSr) CoO 3 ), YBCO (YbBa 2 Cu 3 O 7 ).

10. A memory device comprising:

a memory cell having a variable resistance element which comprises a perovskite-type oxide between a first electrode and a second electrode, and of which electric resistance between the first electrode and the second electrode is changed by applying a voltage pulse between the first electrode and the second electrode; and

a voltage pulse generation circuit for generating the voltage pulse to be applied to the variable resistance element;

wherein the variable resistance element has a resistance hysteresis characteristic, in which a changing rate of a resistance value is changed from positive to negative with respect to increase of a cumulative pulse applying time in the application of the voltage pulse; and

the voltage pulse generation circuit generates the voltage pulse to be applied to the variable resistance element on the basis of the resistance hysteresis characteristic and so that the cumulative pulse applying time is not longer than a specific cumulative pulse applying time, on which the changing rate of the resistance value is changed from positive to negative with respect to increase of the cumulative pulse applying time in the resistance hysteresis characteristic.

11. The memory device according to claim 10 , wherein the memory device controls the specific cumulative pulse applying time by controlling the voltage amplitude of the voltage pulse generated by the voltage pulse generation circuit.

12. The memory device according to claim 10 , wherein the memory device controls the resistance value of the variable resistance element after applying the voltage pulse by controlling the pulse applying time or the cumulative pulse applying time of the voltage pulse.

13. The memory device according to claim 10 , comprising a memory cell array configured by arranging the memory cells in a matrix; wherein the voltage pulse generation circuit is configured so as to be capable of generating a writing voltage pulse of a predetermined polarity and voltage amplitude when writing the data in the memory cell by increasing the resistance value of the variable resistance element; generating an erasing voltage pulse of a predetermined voltage amplitude at a reverse polarity of the writing voltage pulse when erasing the data from the memory cell by decreasing the resistance value of the variable resistance element; and generating a reading voltage pulse smaller than any voltage amplitude at any polarity among the writing voltage pulse and the erasing voltage pulse when reading the memory data of the memory cell by detecting the resistance value of the variable resistance element, separately.

14. The memory device according to claim 10 , wherein the memory device changes the resistance value of the variable resistance element in a reversibly in a positive area of the changing rate of the resistance value with respect to increase of the cumulative pulse applying time in the resistance hysteresis characteristic.

15. The memory device according to claim 10 , wherein the variable resistance element has the resistance hysteresis characteristic, in which the changing rate of the resistance value is changed from positive to negative with respect to increase of the cumulative pulse applying time in spite of a polarity of the voltage pulse to be applied between the first electrode and the second electrode.

16. The memory device according to claim 10 , wherein the perovskite-type oxide used for the variable resistance element is an oxide including at least one kind of element selected from among Pr, Ca, La, Sr, Gd, Nd, Bi, Ba, Y, Ce, Pb, Sm, and Dy and at least one kind of element selected from among Ta, Ti, Cu, Mn, Cr, Co, Fe, Ni, and Ga.

17. The memory device according to claim 16 , wherein the perovskite-type oxide is an oxide of any one group represented by a general formula (0.1≦x≦1, 0≦z≦1), which is selected from among a Pr i−x Ca x [Mn 1−z M z ]O 3 group (here, M is any element selected from among Ta, Ti, Cu, Cr, Co, Fe, Ni, and Ga); an La 1−x AE x MnO 3 group (here, AE is any divalent alkaline-earth metal selected from among Ca, Sr, Pb, and Ba); an RE 1−x Sr x MnO 3 group (here, RE is any trivalent rare-earth metal selected from among Sm, La, Pr, Nd, Gd, and Dy); La 1−x Co x [Mn 1−z Co z ]O 3 group; a Gd i.x Ca x MnO 3 group; and an Nd 1−x MnO 3 group.

18. The memory device according to claim 10 , wherein the second electrode includes at least one kind of a single piece of noble metal of platinum group metal, an alloy based on the noble metal, an oxide conductive substance of any element selected from among Ir, Ru, Re, and Os; and an oxide conductive substance selected from among SRO (SrRuO 3 ), LSCO ((LaSr) CoO 3 ), YBCO (YbBa 2 Cu 3 O 7 ).

19. The memory device according to claim 10 , wherein the variable resistance element comprises a perovskite-type oxide film on the second electrode; and the first electrode includes at least one kind of a noble metal of platinum group metal, a single piece of metal or its alloy selected from among Ag, Al, Cu, Ni, Ti, and Ta, an oxide conductive substance of any element selected from among Ir, Ru, Re, and Os; and an oxide conductive substance selected from among SRO (SrRuO 3 ), LSCO ((LaSr) CoO 3 ), YBCO (YbBa 2 Cu 3 O 7 ).

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 20, 2015
From: INTELLECTUAL PROPERTIES I KFT.
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 036134/0656 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 9, 2013
From: SHARP KABUSHIKI KAISHA
To: INTELLECTUAL PROPERTIES I KFT.
Reel/Frame 029598/0529 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 28, 2005
From: HOSOI, YASUNARI; TAMAI, YUKIO; ISHIHARA, KAZUYA; KOBAYASHI, SHINJI; AWAYA, NOBUYOSHI
To: SHARP KABUSHIKI KAISHA
Reel/Frame 016748/0590 →