IP Library Granted Patent US 7,271,104
Granted Patent B2
US 7,271,104 · App. 11/170,895 · Granted Sep 18, 2007

Method for dry etching fluid feed slots in a silicon substrate

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Quick Facts
Patent No.
US 7,271,104
App. No.
11/170,895
Granted
Sep 18, 2007
Kind
B2
Abstract

A method of micro-machining a semiconductor substrate to form one or more through slots therein. The semiconductor substrate has a device side and a fluid side opposite the device side. The method includes diffusing a p-type doping material into the device side of the semiconductor substrate in one or more through slot locations to be etched through a thickness of the substrate. The semiconductor substrate is then etched with a dry etch process from the device side of the substrate to the fluid side of the substrate so that one or more through slots having a reentrant profile are formed in the substrate.

Claims (20)

1. A method of micro-machining a semiconductor substrate to form one or more through slots therein, the semiconductor substrate having a device side and a fluid side opposite the device side, the method comprising the steps of:

diffusing a p-type doping material into the device side of the semiconductor substrate in one or more through slot locations to be etched through at least a partial thickness of the substrate; and

etching the semiconductor substrate with a dry etch process from the device side of the substrate to the fluid side of the substrate whereby one or more slots are formed in the substrate through an entire thickness thereof without substantial device side damage.

2. The method of claim 1 , wherein the p-type doping material comprises boron from a diborane source.

3. The method of claim 1 , wherein the p-type doping material is diffused into the substrate in a pattern substantially circumscribing each of the one or more through slot locations to provide a race-track pattern of the doping material adjacent to the one or more through slot locations.

4. The method of claim 3 , wherein the pattern further comprises an area of p-type doping material substantially bisecting the race-track pattern.

5. The method of claim 1 , wherein the p-type doping material is diffused into the substrate to provide a concentration of p-type doping material of greater than about 1×10 19 per cm 3 in the substrate.

6. The method of claim 1 , wherein the p-type doping material has a diffusion depth in the substrate ranging from about 0.5 to about 9 microns.

7. The method of claim 1 , wherein the dry etch process comprises a multi-step dry etch process.

8. The method of claim 1 , wherein a dry etching plasma for the etching process is derived from a silicon etching source.

9. The method of claim 8 , wherein the silicon etching source comprises sulfur hexafluoride.

10. In a deep reactive ion etching process for etching a semiconductor substrate through an entire thickness thereof from a device side thereof to a fluid side thereof using a dry etch process to form at least one reentrant fluid flow slot therein in a fluid flow slot location, the improvement comprising, doping a portion of the device side of the substrate with a p-type doping material whereby device side silicon damage adjacent the at least one fluid flow slot is effectively reduced.

11. The improvement of claim 10 , wherein the p-type doping material comprises boron from a diborane source.

12. The improvement of claim 10 , wherein the p-type doping material is diffused into the substrate in a pattern substantially circumscribing the fluid flow slot location to provide a race-track pattern of the doping material adjacent to the fluid flow slot location.

13. The improvement of claim 12 , wherein the pattern further comprises an area of p-type doping material substantially bisecting the race-track pattern.

14. The improvement of claim 10 , wherein the p-type doping material is diffused into the substrate to provide a concentration of p-type doping material of greater than about 1×10 19 per cm 3 in the substrate.

15. The improvement of claim 10 , wherein the p-type doping material has a diffusion depth in the substrate ranging from about 0.5 to about 9 microns.

16. The improvement of claim 10 , wherein the deep reactive ion etching process comprises a multi-step deep reactive ion etching process.

17. The improvement of claim 10 , wherein an etching plasma for the deep reactive ion etching process is derived from a silicon etching source.

18. The improvement of claim 10 , wherein the silicon etching source comprises sulfur hexafluoride.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 20, 2025
From: FUNAI GROUP CO., LTD
To: FUNAI ELECTRIC CO., LTD.
Reel/Frame 073121/0824 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 20, 2025
From: FUNAI ELECTRIC CO., LTD. (F/K/A FE-TECH CO., LTD.)
To: FEC IP LLC
Reel/Frame 073121/0883 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 14, 2013
From: LEXMARK INTERNATIONAL, INC.; LEXMARK INTERNATIONAL TECHNOLOGY, S.A.
To: FUNAI ELECTRIC CO., LTD
Reel/Frame 030416/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 13, 2006
From: BERNARD, DAVID L.; KRAWCZYK, JOHN W.; MCNEES, ANDREW L.
To: LEXMARK INTERNATIONAL, INC.
Reel/Frame 018393/0946 →