IP Library Granted Patent US 7,587,179
Granted Patent B1
US 7,587,179 · App. 11/171,511 · Granted Sep 8, 2009

Direct synthesis transmitter

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,587,179
App. No.
11/171,511
Granted
Sep 8, 2009
Kind
B1
Abstract

A direct synthesis transmitter. A very efficient and highly linear direct synthesis transmitter is provided that can be used to directly synthesize and transmit any type of modulated signal. The direct synthesis transmitter includes a phase-locked loop (PLL) with controls phase modulation plus an accompanying variable gain amplifier for amplitude modulation. Also included is a system to align the phase and amplitude modulation signals. A transmitter constructed in accordance with the present invention is very efficient and suitable for use in portable radio equipment.

Claims (35)

1. Apparatus for direct synthesis of a modulation waveform in a PLL circuit, the apparatus comprising:

a voltage controlled oscillator (VCO) that produces a VCO output, said VCO comprising a first VCO port that receives a control voltage and a second VCO port that receives a modulation signal;

a phase detector having a phase output that is coupled to the VCO;

an N-counter coupled to receive the VCO output and produce a counter output that is input to the phase detector; and

a modulation circuit coupled to modulate the N-counter to produce fractional values of N;

wherein said PLL is configured so that the modulation signal is applied to the PLL through the second VCO port and not through a feedback loop of the PLL.

2. The apparatus of claim 1 , wherein the modulator circuit operates to remove modulation applied by the modulation signal at the second VCO port.

3. The apparatus of claim 1 , further comprising a phase data input circuit that receives phase modulation data and outputs differentiated data that is coupled to the second port of the voltage-controlled oscillator.

4. The apparatus of claim 1 , further comprising a variable gain amplifier (VGA) that receives the VCO output and an amplitude-control signal to produce a VGA output having a selected envelope characteristic.

5. The apparatus of claim 4 , further comprising an alignment circuit to time align the amplitude control signal with the modulation signal.

6. The apparatus of claim 5 , wherein the alignment circuit is configured to provide the amplitude-control signal through a signal path substantially approximating the time delay of the modulation signal path.

7. The apparatus of claim 1 , wherein said modulation signal is a direct modulation signal.

8. A method for direct synthesis of a modulation waveform in a PLL circuit, the method comprising:

modulating a reference signal with a phase-locked loop circuit that comprises a two-port voltage-controlled oscillator (VCO) and a fractional-N counter;

adjusting the fractional-N counter to obtain fractional values of N;

applying a frequency control signal to a first port of the two-port VCO; and

applying a modulation signal to a second port of the two-port VCO;

wherein said modulation signal is applied to the PLL through the second VCO port and not through a feedback loop of the PLL.

9. The method of claim 8 , further comprising removal of substantially all components of the modulation signal applied at the second port of the two-port VCO by a modulation circuit coupled to the fractional N-counter.

10. The method of claim 8 , wherein said modulation signal comprises a signal provided by an output of a phase data input circuit, said phase data input circuit receiving phase modulation data and providing as said output differentiated data.

11. The method of claim 8 , further comprising providing an amplitude-control signal to a variable gain amplifier (VGA) to provide a selected output amplitude envelope.

12. The method of claim 11 , wherein said amplitude-control signal is time aligned with said modulation signal.

13. A direct synthesis transmitter comprising:

a PLL circuit including:

a voltage controlled oscillator (VCO) that produces a VCO output, said VCO having a first input port configured to receive a control signal, and a second input port configured to receive a modulation signal;

a phase detector having a phase output coupled to the VCO; and

an N-counter coupled to receive the VCO output and produce a counter output that is input to the phase detector;

a modulation circuit coupled to modulate the N-counter to produce fractional values of N;

an amplitude control circuit configured to produce an amplitude control signal associated with said modulation signal; and

a variable gain amplifier (VGA) output circuit disposed to receive the VCO output and the amplitude control signal and provide an output signal having a selected output envelope;

wherein said PLL is configured so that the modulation signal is applied to the PLL through the second VCO input port and not through a feedback loop of the PLL.

14. The transmitter of claim 13 , wherein the modulator circuit operates to remove modulation applied by the modulation signal at the second input port of the VCO.

15. The transmitter of claim 14 , further comprising a phase data input circuit that receives phase modulation data and outputs differentiated data that is coupled to the second input port of the VCO.

16. The transmitter of claim 15 , further comprising an alignment circuit, said alignment circuit configured to time align the amplitude-control signal to substantially approximate the time delay of the modulation signal.

17. The transmitter of claim 15 , further comprising a power amplifier (PA) coupled to the output of the VGA to provide a modulated transmit signal having a selected power level.

Assignments (6)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 29, 2015
From: QUINTIC MICROELECTRONICS (WUXI) CO., LTD.
To: NXP B.V.
Reel/Frame 034854/0262 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 12, 2015
From: NXP B.V.
To: QUINTIC MICROELECTRONICS (WUXI) CO., LTD.
Reel/Frame 034752/0761 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 9, 2015
From: NXP B.V.
To: QUINTIC MICROELECTRONICS (WUXI) CO., LTD.
Reel/Frame 034747/0893 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 23, 2014
From: QUINTIC HOLDINGS
To: QUINTIC MICROELECTRONICS (WUXI) CO., LTD.
Reel/Frame 034037/0541 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 11, 2009
From: SEQUOIA COMMUNICATIONS CORPORATION
To: QUINTIC HOLDINGS
Reel/Frame 023639/0014 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 28, 2009
From: GROE, JOHN B; AUSTIN, JOSEPH; FARIAS, NAONE; LO, CARRIE
To: SEQUOIA COMMUNICATIONS
Reel/Frame 022747/0569 →