Method and system for processing multipath clusters
View Patent ↗In an RF communication system, aspects for processing multipath clusters may comprise tracking a plurality of received clusters of signals and estimating a phase and amplitude of at least a portion of each of the plurality of received clusters of signals. Each of the plurality of received clusters of signals may be specified in time and an aggregate of received signal paths in a single cluster for a single base station may be processed. At least one cluster path processor may be assigned to process the plurality of received clusters of signals from each transmitting antenna at a single base station. At least one cluster path processor may be assigned to each of a plurality of base stations that are utilized for soft handoff.
1. A method for processing received signals, comprising:
receiving a plurality of signal clusters, each of said plurality of signal clusters comprising a plurality of individual distinct path signals;
concurrently generating a corresponding symbol for each of said received plurality of signal clusters;
comparing each of said concurrently generated corresponding symbols to a threshold signal value; and
combining said plurality of concurrently generated corresponding symbols based on said comparing of said each of said concurrently generated corresponding symbols to said threshold signal value.
2. The method according to claim 1 , further comprising:
generating a corresponding timing signal for said each of said received plurality of signal clusters.
3. The method according to claim 2 , wherein said step of generating said corresponding timing signal comprises:
generating said corresponding time stamp for each of said generated corresponding timing signals based on said comparing of said each of said concurrently generated corresponding symbols to said threshold signal value.
4. The method according to claim 3 , further comprising:
determining a reference symbol among said plurality of concurrently generated corresponding symbols based on said generated corresponding time stamps.
5. The method according to claim 4 , further comprising:
determining a reference timing signal which corresponds to said determined reference symbol based upon said corresponding timing signal.
6. The method according to claim 5 , further comprising:
determining a reference time stamp which corresponds to said reference timing signal based upon said generated corresponding time stamp.
7. The method according to claim 6 , further comprising:
computing a difference between each of said plurality of corresponding time stamps and said reference time stamp.
8. The method according to claim 7 , further comprising:
comparing each of said computed differences to a threshold timing value.
9. The method according to claim 8 , further comprising:
combining said plurality of concurrently generated corresponding symbols based on said comparing of each of said computed differences to said threshold timing value.
10. The method according to claim 9 ,
wherein for each of said plurality of concurrently generated corresponding symbols, said step of combining said plurality of concurrently generated corresponding symbols comprises:
reading a current value from a buffer at a specified location;
generating a modified value based on said read current value and a current one of said plurality of concurrently generated corresponding symbols; and
writing said modified value to said buffer at said specified location.
11. The method according to claim 10 , further comprising:
determining said specified location based on a generated write address.
12. The method according to claim 11 , further comprising:
generating said write address based on said generated corresponding timing signal, which corresponds to said current one of said plurality of concurrently generated corresponding symbols.
13. The method according to claim 3 , further comprising;
comparing said reference timing signal and a generated slot clock signal.
14. The method according to claim 13 , further comprising:
generating one or more control signals based on said comparing of said reference timing signal and said generated slot clock signal.
15. The method according to claim 14 , further comprising:
adjusting said generated slot clock signal based on said generated one or more control signals.
16. The method according to claim 15 , further comprising:
generating a read strobe signal based on said adjusted generated slot clock signal a generated time offset.
17. The method according to claim 16 , further comprising:
generating a read address based on said generated read strobe signal.
18. The method according to claim 17 , further comprising:
outputting a result of said combining of said plurality of concurrently generated corresponding symbols from a buffer based on said generated read address.
19. A system for processing received signals, comprising:
a cluster path processor configured to:
receive a plurality of signal clusters each of said plurality of signal clusters comprising a plurality of individual distinct path signals,
to concurrently generate a corresponding symbol for each of said received plurality of signal clusters,
to compare each of said concurrently generated corresponding symbols to a threshold signal value, and
to combine said plurality of concurrently generated corresponding symbols based on said comparing of said each of said concurrently generated corresponding symbols to said threshold signal value.
20. The system according to claim 19 , wherein said cluster path processor is further configured to generate a corresponding timing signal for said each of said received plurality of signal clusters.
21. The system according to claim 20 , wherein said cluster path processor is configured to generate a corresponding time stamp for each of said generated corresponding timing signals based on said comparing of said each of said concurrently generated corresponding symbols to said threshold signal value to generate said corresponding timing signal for said each of said received plurality of signal clusters.
22. The system according to claim 21 , wherein said cluster path processor is further configured to determine a reference symbol among said plurality of concurrently generated corresponding symbols based on said generated corresponding time stamps.
23. The system according to claim 22 , wherein a reference timing signal is said generated corresponding timing signal, which corresponds to said determined reference symbol.
24. The system according to claim 23 , wherein a reference time stamp is said generated corresponding time stamp, which corresponds to said reference timing signal.
25. The system according to claim 24 , wherein said cluster path processor is further configured to compute a difference between each of said plurality of generated corresponding time stamps and said reference time stamp.
26. The system according to claim 25 , wherein said cluster path processor is further configured to compare each of said computed differences to a threshold timing value.
27. The system according to claim 26 , wherein said cluster path processor is further configured to combine said plurality of concurrently generated corresponding symbols based on said comparing of each of said computed difference(s) differences to said threshold timing value.
28. The system according to claim 27 , wherein said cluster path processor is configured to perform said combining by, for each of said plurality of concurrently generated corresponding symbols:
reading a current value from a buffer at a specified location;
generating a modified value based on said read current value and a current one of said plurality of concurrently generated corresponding symbols; and
writing said modified value to said buffer at said specified location.
29. The system according to claim 28 , wherein said cluster path processor is further configured to determine said specified location based on a generated write address.
30. The system according to claim 29 , wherein said cluster path processor is further configured to generate said write address based on said generated corresponding timing signal, which corresponds to said current one of said plurality of concurrently generated corresponding symbols.
31. The system according to claim 21 , wherein said cluster path processor is further configured to compare said reference timing signal and a generated slot clock signal.
32. The system according to claim 31 , wherein said cluster path processor is further configured to generate one or more control signals based on said comparing of said reference timing signal and said generated slot clock signal.
33. The system according to claim 32 , wherein said cluster path processor is further configured to adjust said generated slot clock signal based on said generated one or more control signals.
34. The system according to claim 33 , wherein said cluster path processor is further configured to generate a read strobe signal based on said adjusted generated slot clock signal a generated time offset.
35. The system according to claim 34 , wherein said cluster path processor is further configured to generate a read address based on said generated read strobe signal.
36. The system according to claim 35 , wherein said cluster path processor is further configured to output a result of said combining of said plurality of concurrently generated corresponding symbols from a buffer based on said generated read address.