Semiconductor memory circuit
View Patent ↗The present invention provides a semiconductor memory circuit capable of reducing current consumption at non-operation in a system equipped with a plurality of chips that share the use of a power supply, address signals and a data bus. The semiconductor memory circuit has an internal circuit which is capable of selectively performing the supply and stop of an operating voltage via switch means and includes a memory array. An input circuit, which receives a predetermined control signal therein, controls the supply and stop of the operating voltage by the switch means to reduce a DC current and a leak current when no memory operation is done, whereby low power consumption can be realized.
1. A semiconductor circuit device, comprising:
a first input circuit which receives a first power supply voltage and a first signal and which outputs an internal signal;
a second input circuit which receives the first power supply voltage and control signals;
an internal circuit which outputs a second signal in response to the control signals;
an output circuit which outputs an output signal based on the second signal; and
a generator circuit which supplies an operation voltage to the internal circuit,
wherein the generator circuit selectively supplies the operation voltage to the internal circuit in response to the internal signal, and
wherein the output circuit is controlled to reach an output high impedance state in response to the internal signal.
2. A semiconductor circuit device according to claim 1 ,
wherein the first signal instructs a first mode which stops supplying the operation voltage to the internal circuit, and
wherein the output circuit is brought to the output high impedance state in the first mode.
3. A semiconductor circuit device according to claim 2 , wherein the first mode is a low power consumption mode.
4. A semiconductor circuit device according to claim 2 , wherein the generator circuit includes:
an operation voltage generating circuit which supplies the second power voltage to the internal circuit;
a switch circuit which receives a second operation voltage and selectively supplies the second power supply voltage to the operation voltage generating circuit via the switch circuit in response to the internal signal.
5. A semiconductor circuit device according to claim 1 , wherein the internal circuit includes:
a memory array which includes a plurality of word lines, a plurality of data lines, a plurality of memory cells respectively connected to the plurality of word lines and the plurality of data lines, and a word line drive circuit connected to the plurality of word lines,
wherein the operation voltage is a voltage for driving the word line drive circuit.