IP Library Granted Patent US 7,211,465
Granted Patent B2
US 7,211,465 · App. 11/174,824 · Granted May 1, 2007

Method of using capacitive bonding in a high frequency integrated circuit

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Quick Facts
Patent No.
US 7,211,465
App. No.
11/174,824
Granted
May 1, 2007
Kind
B2
Abstract

A method of manufacturing a high frequency integrated circuit begins by positioning a die within a package, wherein the die includes a circuit that processes a high frequency signal and at least one bond pad operably coupled to the circuit, and wherein the package includes a plurality of bond posts, wherein at least one of the plurality of bond posts is allocated to the at least one bond pad. The method continues by bonding a first plate of a capacitor to the at least one bond pad. The method continues by bonding a second plate of the capacitor to the at one of the plurality of bond posts.

Claims (29)

1. A method of manufacturing a high frequency integrated circuit, the method comprises:

positioning a die within a package, wherein the die includes a circuit that processes a high frequency signal and at least one bond pad operably coupled to the circuit, and wherein the package includes a plurality of bond posts, wherein at least one off the plurality of bond posts is allocated to the at least one bond pad;

forming a first plate of a capacitor in direct physical contact with the at least one bond pad;

bonding the first plate of the capacitor to the at least one bond pad;

forming a second plate of the capacitor in direct physical contact with the at least one of the plurality of bond posts; and

bonding the second plate of the capacitor to the at one of the plurality of bond posts.

2. The method of claim 1 further comprises:

bonding a first bond of a bond wire to the at least one of the plurality of bond posts; and

bonding a second end of the bond wire to a ground bond pad of the die, wherein inductance of the bond wire in combination with capacitance of the capacitor form at least a portion of an impedance transformation circuit.

3. The method of claim 1 further comprises:

bonding a first end of a bond wire to the at least one of the plurality of bond posts; and

bonding a second end of the bond wire to the at least one bond pad such that inductance of the bond wire and capacitance of the capacitor form a tank circuit.

4. The method of claim 1 , wherein the bonding of the first and second plate further comprises at least one of:

ultrasonic bonding;

ionic bonding; and

thermal compression bonding.

5. A method of manufacturing a high frequency integrated circuit, the method comprises:

positioning a die within a packaqe, wherein the die includes a circuit that processes a high frequency signal and at least one bond pad operably coupled to the circuit, and wherein the package includes a plurality of bond posts, wherein at least one of the plurality of bond posts is allocated to the at least one bond pad; and

creating a dielectric between the at least one bond pad and the at least one of the plurality of bond posts to produce a bond capacitor that electrically couples the circuit to, and is in direct physical contact with, the at least one of the plurality of bond posts.

6. The method of claim 5 further comprises:

bonding a first end of a bond wire to the at least one of the plurality of bond posts; and

bonding a second end of the bond wire to a ground bond pad of the die, wherein inductance of the bond wire in combination with capacitance of the capacitor form at least a portion of an impedance transformation circuit.

7. The method of claim 5 further comprises:

bonding a first end of a bond wire to the at least one of the plurality of bond posts; and

bonding a second end of the bond wire to the at least one bond pad such that inductance of the bond wire and capacitance of the capacitor form a tank circuit.

8. The method of claim 5 , wherein the bonding of the first and second plate further comprises at least one of:

ultrasonic bonding;

ionic bonding; and

thermal compression bonding.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 28, 2021
From: VIXS SYSTEMS, INC.
To: PIXELWORKS, INC.
Reel/Frame 056697/0568 →
RELEASE OF SECURITY INTEREST Recorded Aug 18, 2017
From: COMERICA BANK
To: VIXS SYSTEMS, INC.
Reel/Frame 043601/0817 →
SECURITY AGREEMENT Recorded Feb 11, 2009
From: VIXS SYSTEMS INC.
To: COMERICA BANK
Reel/Frame 022240/0446 →