IP Library Granted Patent US 7,177,969
Granted Patent B2
US 7,177,969 · App. 11/176,390 · Granted Feb 13, 2007

Universal serial bus circuit which detects connection status to a USB host

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Quick Facts
Patent No.
US 7,177,969
App. No.
11/176,390
Granted
Feb 13, 2007
Kind
B2
Abstract

The invention relates to universal serial bus circuits utilized in USB devices and USB hubs. Specifically, the invention relates to circuitry used to detect whether the hub or device is connected to a USB host, i.e. to detect connection status of the device or hub. The present invention provides a USB circuit comprising a microprocessor which receives signaling concerning the connection status of the USB circuit to a USB host circuit, first and second data signal lines which transmit respective first and second data signals to the microprocessor, a USB host power supply signal line which receives USB host power signaling to indicate connection status, and wherein the USB circuit analyzes the USB power supply signal line and change the data signal transmittal down the first and second data lines according to the connection status of USB circuit to the USB host circuit.

Claims (33)

1. A USB circuit comprising:

a microprocessor arranged to receive signaling concerning a connection status of the USB circuit to a USB host circuit;

first and second data signal lines arranged to transmit respective first and second data signals to the microprocessor;

a USB host power supply signal line arranged to receive USB host power signaling to indicate the connection status of the USB circuit to the USB host circuit; and

wherein the USB circuit comprises connection status signaling circuitry which is arranged to analyze the USB power supply signal line and change the data signal transmitted down the first and second data lines according to the connection status of the USB circuit to the USB host circuit.

2. The USB circuit according to claim 1 , wherein the connection status signaling circuitry comprises a NOT gate and two OR gates, the NOT gate providing an input into each of the two OR gates, the remaining OR gate inputs each being connected to the host end of one of the data signal lines, and wherein the output of the two OR gates is connected to a microprocessor end of the corresponding data line.

3. The USB circuit according to claim 1 , wherein the circuit includes a NAND gate connected to the data lines to convert the simultaneous “1” signaling state to a single “0” signal state.

4. The USB circuit according to claim 3 , comprising a signal filter connected to the NAND gate input to reduce signal inconsistencies.

5. The USB circuit according to claim 3 , wherein the NAND gate is incorporated into the microprocessor.

6. The USB circuit according to claim 1 , comprising a signal filter arranged to reduce signal inconsistencies between signalling from the data signal lines.

7. The USB circuit according to claim 1 , wherein the microprocessor and/or connection status signaling circuitry is contained in a USB Digital ASIC.

8. The USB circuit according to claim 1 , wherein the USB circuit comprises a transceiver and the connection status signaling circuitry is incorporated into the transceiver.

9. The USB circuit according to claim 7 , wherein the USB circuit comprises a transceiver and the microprocessor is incorporated into the transceiver.

10. The USB circuit according to claim 1 , wherein the USB circuit is incorporated into a USB device.

11. The USB circuit according to claim 1 , wherein the USB circuit is incorporated into a USB hub.

12. A USB device comprising a USB circuit according to claim 1 .

13. A USB hub comprising a USB circuit according to claim 1 .

14. A printer comprising a USB circuit according to claim 1 .

15. A keyboard comprising a USB circuit according to claim 1 .

16. A scanner comprising a USB circuit according to claim 1 .

17. A modem comprising a USB circuit according to claim 1 .

18. A camera comprising a USB circuit according to claim 1 .

19. A mobile telephone comprising a USB circuit according to claim 1 .

20. A MP3 player comprising a USB circuit according to claim 1 .

21. A device for performing multiple functions, comprising a USB circuit according to claim 1 .

22. A monitor comprising a USB circuit according to claim 1 .

23. A self-powered device comprising a USB circuit according to claim 1 .

24. A self-powered hub comprising a USB circuit according to claim 1 .

25. A USB apparatus comprising:

means for processing arranged to receive signaling concerning a connection status of the USB apparatus to a USB host apparatus;

first and second data signal lines arranged to transmit respective first and second data signals to the means for processing:

a USB host power supply signal line arranged to receive USB host power signaling to indicate the connection status of the USB apparatus to the USB host apparatus; and

wherein the USB apparatus comprises connection status signaling circuitry which is arranged to analyze the USB power supply signal line and change the data signal transmitted down the first and second data lines according to the connection status of the USB apparatus to the USB host apparatus.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 29, 2019
From: III HOLDINGS 3, LLC
To: SEAGATE TECHNOLOGY LLC
Reel/Frame 048167/0929 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 18, 2015
From: NOKIA CORPORATION
To: III HOLDINGS 3, LLC
Reel/Frame 034978/0316 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 21, 2014
From: CROYLE, RICHARD
To: NOKIA CORPORATION
Reel/Frame 034236/0209 →