Driver circuit of display device
View Patent ↗In a driver circuit of a display device, an electric potential difference between high-level power supply voltage VDD and low-level power supply voltage VSS2 in shift registers and buffers is set smaller than an electric potential difference between high-level voltage VDD and low-level voltage VSS of enable signals OE in order to prevent increase in voltage stress on each transistor and concurrently to make larger an electric potential difference between high-level voltage and low-level voltage of output signals.
1. A driver circuit in a display device, comprising:
shift registers to shift phases of input signals to be inputted thereinto, and for thereafter outputting the phase-shifted signals; and
buffers to amplify amplitudes of output signals from the shift registers by use of enable signals, and for thereafter outputting the amplified signals to scan lines or signals lines,
wherein an electric potential difference between high-level voltage and low-level voltage of the enable signals is used as an electric potential difference with which to drive the scan lines or the signal lines, and an electric potential difference between high-level power supply voltage and low-level power supply voltage in the shift registers and the buffers is set smaller than the electric potential difference between the high-level voltage and the low-level voltage of the enable signals.
2. The driver circuit in the display device according to claim 1 , wherein each of the buffers comprises an output circuit, the output circuit including:
a transistor having a conductive path between an enable terminal into which to input the enable signals and an output terminal from which to output the amplified signals; and
a transistor having a conductive path between the output terminal and the power supply voltage.
3. The driver circuit in the display device according to claim 1 ,
wherein each of transistors constituting the shift registers and the buffers is a pMOS transistor, and
the low-level power supply voltage in the shift registers and the buffers is set higher than the low-level voltage of the enable signals.
4. The driver circuit in the display device according to claim 1 , wherein each of transistors constituting the shift registers and the buffers is an NMOS transistor, and
the high-level power supply voltage in the shift registers and the buffers is set lower than the high-level voltage of the enable signals.