Folded frame carrier for MOSFET BGA

1. A method for packaging a semiconductor die comprising the steps of:

providing a lead frame with a planar portion for receiving and holding the semiconductor die;

forming one or more studs along a first edge of the planar portion of the lead frame;

forming a groove in the surface of the planar portion disposed parallel to, and spaced apart from, the first edge;

forming a tip with a four sided taper on the end of each of the one or more studs;

bending the first edge around the groove to an angle with respect to the planar portion of the lead frame.

2. The method of claim 1 wherein the angle is between 84 and 90 degrees.

3. The method of claim 1 wherein the step of forming one or more studs comprises removing material from the first edge to leave the one or more studs along the edge.

4. The method of claim 1 comprising the further step of spanking the tip on each of the one or more studs.

5. The method of claim 1 wherein the step of forming a groove includes machining a v-groove into the surface of the planar portion of the lead frame.

6. The method of claim 1 further comprising

providing a semiconductor die with a die attach surface and a ball grid array surface; and

attaching the die attach surface of the semiconductor die to the planar portion of the lead frame so that the ball grid array faces away from the planar portion of the lead frame;

wherein the groove is formed and the first edge of the lead frame is bent such that the tip on each of the one or more studs is coplanar with the array of balls disposed on the surface of the semiconductor die.

7. The method of claim 1 comprising the further steps of:

providing a semiconductor die with only one terminal on one surface and one or more terminals on its other surface;

forming a planar contact on the surface with only one terminal and forming a ball grid array of contacts on the other surface; and

attaching the planar contact of the semiconductor die to the planar portion of the lead frame;

wherein the groove is formed and the first edge of the lead frame is bent such that the tip on each of the one or more studs is coplanar with the ball grid array.

8. The method of claim 7 wherein the semiconductor die is a mosfet and the surface with only one terminal carries a drain terminal and the other surface carries source and gate terminals.

9. The method of claim 1 further comprising:

forming one or more studs along a second edge of the planar portion of the lead frame;

forming a second groove in the surface of the planar portion disposed parallel to, and spaced apart from, the second edge; and

bending the second edge to an angle with respect to the planar portion of the lead frame.

10. The method of claim 9 further comprising:

forming one or more studs along a third edge of the planar portion of the lead frame;

forming a third groove in the surface of the planar portion disposed parallel to, and spaced apart from, the third edge; and

bending the third edge to an angle with respect to the planar portion of the lead frame.

11. A flip chip packaged semiconductor device comprising:

a die attach pad comprising a planar portion for receiving a semiconductor die;

an adhesive or solder layer on the planar portion for holding a semiconductor die;

a semiconductor die having one surface facing and attached to the planar portion of the die attach pad by the adhesive or solder;

a wall along one edge of the die attach pad disposed transverse to the die attach pad; and

a plurality of studs extending from the wall and spaced from each other;

wherein the ends of the stubs have four sided trapezoidal tapered tips.

12. The flip chip packaged semiconductor device of claim 11 wherein the semiconductor further comprises an array of bumps or balls on a surface opposite the surface facing the planar portion of the die attach pad.

13. The flip chip packaged semiconductor device of claim 11 wherein the tips of the studs and the tips of the bumps or balls lie in a common plane.

14. The flip chip packaged semiconductor device of claim 11 wherein the die attach pad and walls are formed from a sheet of copper or copper alloy.

15. A flip chip packaged semiconductor device comprising:

a die attach pad comprising a planar portion for receiving a semiconductor die and by one or more edges;

an adhesive or solder layer on the planar portion for holding a semiconductor die;

a semiconductor die having one surface attached to the planar portion of the die attach pad by adhesive or solder and another surface with bump or ball contacts;

one or more walls, each wall along an edge of the die attach pad and disposed transverse to the die attach pad; and

a plurality of spaced apart studs extending from each of the one or more walls;

wherein the ends of each of the plurality of studs have a four sided trapezoidal tapered tip.

16. The flip chip packaged semiconductor of claim 15 wherein the die attach pad has four edges and at least one wall with studs.

17. The flip chip packaged semiconductor of claim 15 wherein the die attach pad has four edges and at least two walls with studs.

18. The flip chip packaged semiconductor of claim 15 wherein the die attach pad has four edges and at least three walls with studs.

19. The flip chip packaged semiconductor of claim 15 wherein the tops of the studs are substantially coplanar with the bump or ball contacts.

20. The flip chip packaged semiconductor of claim 15 wherein a junction of the base of each of the one or more walls and the die attach pad is defined by a groove of removed die attach material.

21. The flip chip packaged semiconductor of claim 15 wherein each of the walls is bent about an axis defined by the groove associated with the respective wall.

22. The flip chip packaged semiconductor of claim 15 wherein the die attach pad and the one or more walls comprise a common material and the junction of the base of the one or more walls and the die attach pad is further defined by a bend in the common material.

23. A method for packaging a semiconductor die comprising the steps of:

providing a lead frame with a planar die attach pad for receiving and holding the semiconductor die;

punching studs into one or more edges of the die attach pad to form one or more studs projecting from each punched edge;

cutting a groove in the surface of the die attach pad proximate to each punched edge; and

bending each punched edge about its respective cut groove in a direction toward the groove to dispose the punched edge with studs at an angle with respect to the die attach pad in two separate steps.

24. The method of claim 23 further comprising the steps of:

providing a semiconductor die with one surface planar with a planar contact and an opposite surface with bump contacts;

attaching the planar surface of the semiconductor die to the planar die attach pad; and

bending each punched edge with studs about an axis parallel to its respective groove until the ends of the studs are coplanar with the tip of the bumps of the semiconductor surface.

25. A method for packaging a semiconductor die comprising the steps of:

providing a lead frame with a planar portion for receiving and holding the semiconductor die;

forming studs along one edge of the planar portion of the lead frame;

forming a groove in the surface of the planar portion disposed parallel to the edge with studs and spaced from the studs;

bending the edge with studs around the groove to an angle with respect to the planar portion of the lead frame; and

spanking the ends of the studs.

26. The method of claim 25 further comprising the steps of:

providing a semiconductor die with one surface planar with a planar contact and an opposite surface with bump contacts;

attaching the planar surface of the semiconductor die to the planar die attach pad; and

bending each punched edge with studs about an axis parallel to its respective groove until the ends of the studs are coplanar with the bumps of the semiconductor surface.