Non-volatile semiconductor memory device allowing concurrent data writing and data reading
View Patent ↗A write bit line and a read bit line are provided separately for a memory cell. A source line connecting to the memory cell is formed of a source impurity region the same in conductivity type as a substrate region. A memory cell transistor and the source impurity region are connected by a metal interconnection line of a low resistance. A rise in the source line potential can be prevented, and a memory cell current can reliably be generated according to storage data. Further, fast data reading can be achieved. Additionally, by performing precharging and data amplification in a unit of read bit line, the load of the read bit line can be alleviated to achieve fast reading. An accessing time of a non-volatile semiconductor memory device that uses a variable resistance element as a storage element is reduced without increasing the current consumption.
1. A non-volatile semiconductor memory device comprising:
a plurality of non-volatile memory cells, arranged in rows and columns, each having physical state thereof set according to storage information and storing information in a non-volatile manner based on said physical state;
a write circuit for supplying, in data writing, a write current to a write target memory cell among said plurality of non-volatile memory cells, to perform data writing to said write target memory cell; and
a read circuit for performing data reading from a read target memory cell among said plurality of non-volatile memory cells, said read circuit operable concurrently with said write circuit, said read circuit performing data reading after activation of said write circuit, with said write target memory cell being said read target memory cell, concurrently with writing by said write circuit within a common operation cycle.
2. A non-volatile semiconductor memory device comprising:
a plurality of non-volatile memory cells, arranged in rows and columns, each having physical state thereof set according to storage information and storing information in a non-volatile manner based on said physical state;
a write circuit for supplying, in data writing, a write current to a write target memory cell among said plurality of non-volatile memory cells, to perform data writing to said write target memory cell;
a read circuit for performing data reading from a read target memory cell among said plurality of non-volatile memory cells, said read circuit operable concurrently with said write circuit;
a plurality of write bit lines, arranged corresponding to memory cell columns, each for supplying a first write current from said write circuit to the memory cells on a corresponding column; and
a plurality of read bit lines, arranged separately from the write bit lines and corresponding to the memory cell columns, for supplying a read current for reading data of the read target memory cell from said read circuit,
said write circuit performing data writing, after activation of said read circuit, with said read target memory cell being said write target memory cell, concurrently with reading by said read circuit, the reading and writing operations being repeated while supplying the read current to the read bit line of the read target memory cell until data read by said read circuit coincides with write data of said write circuit.