Semiconductor equipment
View Patent ↗There is provided a semiconductor integrated circuit in which a source clock (S 101 ) is inputted to a delay circuit ( 3 ), a counter circuit ( 6 ) is operated in response to a delay clock (S 102 ) which is the output of the delay circuit ( 3 ), a clock used as a system clock by an internal circuit ( 4 ) is selected from the source clock (S 101 ) and the delay clock (S 102 ) based on the value of the counter circuit ( 6 ), and the duty cycle of the system clock is changed, so that it is possible to reduce electromagnetic interference resulting from harmonics generated by the switching of the internal circuit.
1. Semiconductor equipment, comprising:
an oscillator circuit connected to an oscillator or a radiator and outputting a source clock,
an internal circuit operating in synchronization with a system clock,
a delay circuit for generating a delay clock delayed by a specified time from the source clock outputted from the oscillator circuit,
a counter circuit for counting the delay clock, and
a selector circuit for selecting the source clock and the delay clock based on a value of the counter circuit and outputting the system clock to the internal circuit.
2. The semiconductor equipment according to claim 1 , wherein only a least significant bit has an initial value of “1” and other bits have initial values of “0” in the counter circuit.