IP Library Granted Patent US 7,180,941
Granted Patent B2
US 7,180,941 · App. 11/187,266 · Granted Feb 20, 2007

Transmit amplitude independent adaptive equalizer

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Quick Facts
Patent No.
US 7,180,941
App. No.
11/187,266
Granted
Feb 20, 2007
Kind
B2
Abstract

Transmit amplitude independent adaptive equalizers are provided that compensate for transmission losses in an input signal when the transmit signal amplitude is unknown. Several embodiments are provided, including a first embodiment having an equalizer core, a controllable-swing slicer and an amplitude control loop, a second embodiment having an equalizer core, a fixed-swing slicer and a control loop, a third embodiment having an equalizer core, a variable gain amplifier, and a variable gain amplifier control loop, and a fourth embodiment having an equalizer core, a fixed-swing slicer, a variable gain amplifier, and a variable gain amplifier control loop.

Claims (86)

1. An equalizer, comprising:

an equalizer core coupled to an input signal from a transmission medium that applies a frequency dependant gain to the input signal to compensate for losses incurred in the transmission medium and generates a core output signal;

a controllable-swing slicer coupled to the core output signal and a swing control input that converts the core output signal into a digital output signal having a variable swing, wherein the variable swing of the digital output signal is controlled by the swing control input; and

an amplitude control loop coupled to the core output signal and the digital output signal that compares the core output signal with the digital output signal and generates the swing control input, the amplitude control loop including:

a first filter coupled to the core output signal that generates a first frequency band-limited signal; and

a second filter coupled to the digital output signal that generates a second frequency band-limited signal, the first and second frequency band-limited signals being compared by the amplitude control loop.

2. The equalizer of claim 1 , wherein the amplitude control loop is configured as a proportional (P-type) control loop.

3. The equalizer of claim 1 , wherein the amplitude control loop is configures as an integral (I-type) control loop.

4. The equalizer of claim 1 , wherein the amplitude control loop is configured as a combination proportional-integral (PI type) control loop.

5. The equalizer of claim 1 , wherein the first and second filters respectively filter the core output signal and the digital output signal to a frequency range at which the input signal incurs no significant losses from the transmission medium.

6. The equalizer of claim 1 , wherein the first and second filters respectively filter the core output signal and the digital output signal to a frequency range towards the lower end of the transmit spectrum of the input signal.

7. The equalizer of claim 1 , wherein the first and second filters are low-frequency, band-pass filters.

8. The equalizer of claim 1 , wherein the amplitude control loop further comprises:

a first envelope detector coupled to the first filter that generates a first energy-level output signal as a function of the first frequency band-limited signal; and

a second envelope detector coupled to the second filter that generates a second energy-level output signal as a function of the second frequency band-limited signal;

wherein the amplitude control loop compares the first and second energy-level outputs.

9. The equalizer of claim 8 , wherein the first and second envelope detectors each comprise a rectifier.

10. The equalizer of claim 8 , wherein the first and second envelope detectors each comprise a multiplier.

11. The equalizer of claim 8 , wherein the amplitude control loop further comprises:

an adder coupled to the first and second energy-level outputs that generates the swing control input.

12. The equalizer of claim 11 , wherein:

the first energy-level output signal is coupled as a positive input to the adder; and

the second energy-level output signal is coupled as a negative input to the adder.

13. The equalizer of claim 1 , wherein the amplitude control loop includes an adder that compares the core output signal with the digital output signal.

14. The equalizer of claim 1 , wherein the transmission medium is a coaxial cable.

15. The equalizer of claim 1 , wherein the transmission medium is a printed circuit board trace.

16. The equalizer of claim 1 , wherein the transmission medium is a backplane.

17. The equalizer of claim 1 , wherein the frequency dependant gain is applied to the equalizer input signal by applying a transfer function that approximates an inverse of the losses induced by the transmission medium.

18. The equalizer of claim 1 , further comprising:

a gain control loop coupled to the core output signal and the digital output signal that compares the core output signal with the digital output signal and generates a gain control signal, wherein the gain control signal is coupled as a gain control input to the equalizer core to control the amount of frequency dependant gain applied to the input signal.

19. The equalizer of claim 18 , wherein the gain control loop is implemented as a proportional (P-type) controller.

20. The equalizer of claim 18 , wherein the gain control loop is implemented as an integral (I-type) controller.

21. The equalizer of claim 18 , wherein the gain control loop is implemented as a combination proportional/integral (PI-type) controller.

22. The equalizer of claim 18 , wherein the gain control loop and the amplitude control loop are implemented as different controller types.

23. The equalizer of claim 18 , wherein the gain control loop is implemented as an integral (I-type) controller and the amplitude control loop is implemented as a proportional (P-type) controller.

24. The equalizer of claim 18 , wherein the gain control signal varies from zero to unity as the transmission medium approaches a maximum length.

25. The equalizer of claim 18 , wherein the equalizer core comprises:

a transfer function block coupled to the input signal that applies the frequency dependant gain and generates a transfer function block output;

a multiplier coupled to the transfer function block output and the gain control input that multiplies the transfer function block output and the gain control input and generates a multiplier output, wherein the gain control input varies the frequency dependant gain in proportion to the length of the transmission medium; and

an adder that receives the multiplier output and the equalizer input signal and generates the core output signal.

26. The equalizer of claim 25 , wherein the equalizer core further comprises:

a low-pass filter coupled between the multiplier and the adder that filters high frequency noise from the multiplier output.

27. The equalizer of claim 25 , wherein the equalizer core further comprises:

a low-pass filter coupled to the transfer function block and the adder that filters high frequency noise from the equalizer input signal.

28. The equalizer of claim 18 , wherein the gain control loop comprises:

a first filter coupled to the core output signal that generates a frequency band-limited core output signal; and

a second filter coupled to the digital output signal that generates a frequency band-limited digital output signal;

wherein the frequency band-limited core and digital output signals are compared by the gain control loop.

29. The equalizer of claim 28 , wherein the first and second filters respectively limit the core and digital output signals to a frequency range in which the input signal is attenuated by the transmission medium.

30. The equalizer of claim 28 , wherein the first and second filters are high-frequency, band-pass filters.

31. The equalizer of claim 28 , wherein the gain control loop further comprises:

a first envelope detector coupled to the frequency band-limited core output signal that generates a first energy-level output signal as a function of the frequency band-limited core output signal; and

a second envelope detector coupled to the frequency band-limited digital output signal that generates a second energy-level output signal as a function of the frequency band-limited digital output signal;

wherein the gain control loop compares the first and second energy-level output signals to generate the gain control signal.

32. The equalizer of claim 28 , wherein the first and second envelope detectors each comprise a rectifier.

33. The equalizer of claim 28 , wherein the first and second envelope detectors each comprise a multiplier.

34. The equalizer of claim 28 , wherein the gain control loop further comprises:

an adder coupled to the first and second energy-level signals that generates the gain control signal.

35. The equalizer of claim 34 , wherein:

the first energy-level output is coupled as a negative input to the adder; and

the second energy-level output is coupled as a positive input to the adder.

36. The equalizer of claim 1 , wherein the equalizer core is a multi-stage equalizer core having a plurality of individual equalizer core stages, each of which supplies a portion of the frequency dependant gain.

37. The equalizer of claim 18 , wherein the equalizer core is a multi-stage equalizer core having a plurality of individual equalizer core stages, each of which supplies a portion of the frequency dependant gain, and wherein the gain control loop comprises:

a first filter coupled to the core output signal that generates a frequency band-limited core output signal;

a second filter coupled to the digital output signal that generates a frequency band-limited digital output signal;

a first envelope detector coupled to the frequency band-limited core output signal that generates a first energy-level output as a function of the frequency band-limited core output signal;

a second envelope detector coupled to the frequency band-limited digital output signal that generates a second energy-level output as a function of the frequency band-limited digital output signal;

an adder coupled to the first and second energy-level signals that generates the gain control signal;

a sequencer coupled to the gain control signal that generates a plurality of individual-stage gain control signals, wherein each individual-stage gain control signal controls the portion of the frequency dependant gain supplied by one of the plurality of individual equalizer core stages.

38. The equalizer of claim 37 , wherein the plurality of individual equalizer core stages each supply a portion of the frequency dependant gain sequentially as the transmission medium length increase from zero to a maximum value.

39. The equalizer of claim 37 , wherein the plurality of individual equalizer core stages each supply a substantially equal portion of the frequency dependant gain as the transmission medium length increase from zero to a maximum value.

40. A method for approximating a transmitted signal swing in a serial digital equalizer having a digital output signal, comprising the steps of:

receiving an equalizer input signal from a transmission medium, wherein the transmitted signal swing of the equalizer input signal prior to transmission over the transmission medium is variable;

providing an equalizer core that applies a frequency dependant gain to the equalizer input signal to compensate for frequency dependant transmission losses incurred in the transmission medium, and that generates a core output signal;

filtering the core output signal to isolate a frequency range at which minimal transmission losses are incurred in the transmission medium;

determining a signal swing for the filtered core output signal; and

setting the digital output signal to have an output signal swing substantially equal to the signal swing for the filtered core output signal, wherein the output signal swing approximates the transmitted signal swing

generating a first energy-level signal that is proportional to the signal swing for the filtered core output signal;

filtering the digital output signal to isolate a frequency range at which minimal transmission losses are incurred in the transmission medium;

generating a second energy-level signal that is proportional to an output signal swing for the filtered digital output signal;

comparing the first energy-level signal with the second energy-level signal to generate a swing control signal, wherein the swing control signal is substantially equal to the difference between the first and second energy-level signals; and

providing a controllable swing slicer that receives the core output and the swing control signal and generates the digital output signal, wherein the output signal swing is set by the controllable swing slicer in proportion to the swing control signal.

41. An equalizer, comprising:

an equalizer core coupled to an input signal from a transmission medium that applies a frequency dependant gain to the input signal to compensate for losses incurred in the transmission medium and generates a core output signal;

a controllable-swing slicer coupled to the core output signal and a swing control input that converts the core output signal into a digital output signal having a variable swing, wherein the variable swing of the digital output signal is controlled by the swing control input; and

an amplitude control loop coupled to the core output signal and the digital output signal that compares the core output signal with the digital output signal and generates the swing control input, the amplitude control loop including a plurality of envelope detectors that determine an energy level in the core output signal and the digital output signal, wherein the amplitude control loop compares the energy levels of the core output signal and the digital output signal.

Assignments (6)
ASSIGNMENT OF PATENT SECURITY INTEREST PREVIOUSLY RECORDED AT REEL/FRAME (040646/0799) Recorded Feb 17, 2023
From: HSBC BANK USA, NATIONAL ASSOCIATION, AS RESIGNING AGENT
To: JPMORGAN CHASE BANK, N.A., AS SUCCESSOR AGENT
Reel/Frame 062781/0544 →
SECURITY INTEREST Recorded Nov 17, 2016
From: SEMTECH CORPORATION; SEMTECH NEW YORK CORPORATION; SIERRA MONOLITHICS, INC.; SEMTECH EV, INC.; TRIUNE SYSTEMS, L.L.C.; TRIUNE IP, LLC
To: HSBC BANK USA, NATIONAL ASSOCIATION, AS ADMINISTRATIVE AGENT
Reel/Frame 040646/0799 →
SECURITY AGREEMENT Recorded May 2, 2013
From: SEMTECH CORPORATION; SEMTECH NEW YORK CORPORATION; SIERRA MONOLITHICS, INC.
To: HSBC BANK USA, NATIONAL ASSOCIATION
Reel/Frame 030341/0099 →
CHANGE OF NAME Recorded Nov 26, 2012
From: SEMTECH CANADA INC.
To: SEMTECH CANADA CORPORATION
Reel/Frame 029345/0302 →
CORRECTIVE ASSIGNMENT TO CORRECT THE ERROR PREVIOUSLY RECORDED ON REEL 028333 FRAME 0287. ASSIGNOR(S) HEREBY CONFIRMS THE SERIAL NO. 13/309,951 WAS INADVERTENTLY LISTED ON THE REQUEST FOR RECORDATION. Recorded Nov 20, 2012
From: GENNUM CORPORATION
To: SEMTECH CANADA INC.
Reel/Frame 029340/0083 →
MERGER Recorded Jun 7, 2012
From: GENNUM CORPORATION
To: SEMTECH CANADA INC.
Reel/Frame 028333/0287 →