Power saving method
View Patent ↗A power-saving method of continuous display and effective cost in a system that includes memory directly accessed by a CPU and at least one display device within vertical blanking. The method includes the following steps: issuing a Power-saving related message; dropping the Power-saving related message, wherein a Power-saving related flag is not set; setting the Power-saving related flag; setting a VID/FID pending bit in the CPU, wherein the vertical blanking of the display/displays occurs and clearing the Power-saving related flag, wherein the Power-saving related flag is set, and executing a power saving process.
1. A method of continuous display and effective cost in a system that includes memory directly accessed by a CPU and at least one display within vertical blanking, the method comprising:
issuing a VID/FID change message;
dropping said VID/FID change message, wherein a VID/FID pending flag is not set;
setting said VID/FID pending flag;
setting a VID/FID pending bit in the CPU, wherein the vertical blanking of said display/displays occur;
clearing said VID/FID pending flag, wherein said VID/FID pending flag is set; and
executing a power saving process.
2. The method according to claim 1 , wherein said step of setting said VID/FID pending flag is setting inside the north bridge, the south bridge or the CPU.
3. The method according to claim 1 , wherein said step of setting said VID/FID pending bit in the CPU further comprising:
issuing a LDTREQ# to a south bridge; and
issuing a system management interrupt service routine to the CPU.
4. The method according to claim 1 , wherein said step of executing said power saving process further comprising:
issuing a STPCLK assertion message;
issuing a STOP GRANT system management message;
asserting a SB_LDTSTOP#;
asserting a NB_LDTSTOP#;
disconnecting a host link;
de-asserting a SB_LDTSTOP#;
de-asserting a NB_LDTSTOP#;
connecting said host link; and
issuing a STPCLK de-assertion message.
5. A method of continuous display and effective cost in a system that includes memory directly accessed by a CPU and at least one display within vertical blanking, the method comprising:
setting the advanced configuration and power interface register in north bridge;
dropping said advanced configuration and power interface register, wherein a Power-saving related flag is not set;
setting said Power-saving related flag;
setting a VID/FID pending bit in the CPU, wherein the vertical blanking of said display/displays occur;
clearing said Power-saving related flag, wherein said Power-saving related flag is set; and
executing a power saving process.
6. The method according to claim 5 , wherein said step of setting said Power-saving related flag is setting a VID/FID pending bit inside the north bridge, the south bridge or the CPU.
7. The method according to claim 5 , wherein said step of setting said VID/FID pending bit in the CPU further comprising:
issuing a LDTREQ# to a south bridge; and
issuing a system management interrupt service routine to the CPU.
8. The method according to claim 5 , wherein said step of executing said power saving process further comprising:
issuing a STPCLK assertion message;
issuing a STOP GRANT system management message;
asserting a SB_LDTSTOP#;
asserting a NB_LDTSTOP#;
disconnecting a host link;
de-asserting a SB_LDTSTOP#;
de-asserting a NB_LDTSTOP#;
connecting said host link; and
issuing a STPCLK de-assertion message.