IP Library Granted Patent US 7,485,933
Granted Patent B2
US 7,485,933 · App. 11/193,837 · Granted Feb 3, 2009

Semiconductor integrated circuit device having polycrystalline silicon resistor circuit

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Quick Facts
Patent No.
US 7,485,933
App. No.
11/193,837
Granted
Feb 3, 2009
Kind
B2
Abstract

A semiconductor device has a first insulating film formed on a semiconductor substrate and resistors disposed on the first insulating film. Each of the resistors is formed of a polycrystalline silicon film having a low concentration impurity region and high concentration impurity regions disposed on opposite sides of the low concentration impurity region. The low concentration impurity regions of the plurality of resistors have different lengths from one another. A second insulating film is disposed on the resistors. Contact holes are formed on the second insulating film and are disposed on the high concentration impurity regions. First metal wirings are connected to the respective contact holes and connect the resistors in series. A second metal wiring is connected to one of the resistors located at one end of the resistors connected in series. The second metal wiring covers the low concentration impurity region of all of the resistors.

Claims (28)

1. A semiconductor device comprising:

a semiconductor substrate;

a first insulating film formed on the semiconductor substrate;

a plurality of resistors having the same shape and disposed on the first insulating film, each of the resistors being formed of a polycrystalline silicon film having a low concentration impurity region and high concentration impurity regions disposed on opposite sides of the low concentration impurity region, the low concentration impurity regions of the plurality of resistors having different lengths from one another;

a second insulating film disposed on the plurality of resistors;

a plurality of contact holes formed on the second insulating film and disposed on the high concentration impurity regions;

first metal wirings connected to the respective contact holes and connecting the plurality of resistors in series; and

a second metal wiring connected to one of the resistors located at one end of the plurality of resistors connected in series, the second metal wiring covering the low concentration impurity region of all of the plurality of resistors.

2. A semiconductor device according to claim 1 wherein the length of the low

concentration impurity region in each of the plurality of resistors is longest at a first end of the plurality of resistors connected in series, shortest at a second end of the plurality of resistors connected in series, and gradually becomes shorter from the first end to the second end.

3. A semiconductor device comprising:

a semiconductor substrate;

a first insulating film formed on the semiconductor substrate;

a plurality of polycrystalline silicon resistors disposed on the first insulating film, each of the polycrystalline silicon resistors having a low concentration impurity region and high concentration impurity regions, the low concentration impurity regions of the polycrystalline silicon resistors having different lengths from one another;

a second insulating film disposed on the plurality of polycrystalline silicon resistors;

a plurality of contact holes formed on the second insulating film and disposed on the high concentration impurity regions;

first metal wirings connected to the respective contact holes and connecting the plurality of polycrystalline silicon resistors in series; and

a second metal wiring covering the low concentration impurity region of all of the plurality of polycrystalline silicon resistors.

4. A semiconductor device according to claim 3 wherein the length of the low concentration impurity region in each of the polycrystalline silicon resistors is longest at a first end of the polycrystalline silicon resistors connected in series, shortest at a second end of the polycrystalline silicon resistors connected in series, and gradually becomes shorter from the first end to the second end.

5. A semiconductor device comprising:

a semiconductor substrate;

a first insulating film formed on the semiconductor substrate;

a plurality of polycrystalline silicon resistors connected in series and disposed on the first insulating film, the polycrystalline silicon resistors having low concentration impurity regions and a pattern of high concentration impurity regions disposed on opposite sides of the low concentration impurity regions so that the low concentration impurity regions have different lengths from one another;

a second insulating film disposed on the plurality of polycrystalline silicon resistors;

a plurality of contact holes formed on the second insulating film and disposed on the high concentration impurity regions;

first metal wirings connected to the respective contact holes and connecting the plurality of polycrystalline silicon resistors in series; and

a second metal wiring covering the low concentration impurity region of all of the plurality of polycrystalline silicon resistors.

6. A semiconductor device according to claim 5 wherein the length of the low concentration impurity region in each of the polycrystalline silicon resistors is longest at a first end of the polycrystalline silicon resistors connected in series, shortest at a second end of the polycrystalline silicon resistors connected in series, and gradually becomes shorter from the first end to the second end.

Assignments (3)
CHANGE OF NAME Recorded Mar 12, 2018
From: SII SEMICONDUCTOR CORPORATION
To: ABLIC INC.
Reel/Frame 045567/0927 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 10, 2016
From: SEIKO INSTRUMENTS INC.
To: SII SEMICONDUCTOR CORPORATION
Reel/Frame 038058/0892 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 16, 2005
From: HARADA, HIROFUMI
To: SEIKO INSTRUMENTS INC.
Reel/Frame 016978/0470 →