Reduced complexity error correction encoding techniques
View Patent ↗An error correction encoder inserts redundant parity information into a data stream to improve system reliability. The encoder can generate the redundant parity information using a composite code. Dummy bits are inserted into the data stream in locations reserved for parity information generated by subsequent encoding. The error correction code can have a uniform or a non-uniform span. The span corresponds to consecutive channel bits that are within a single block of a smaller parity code that is used to form a composite code. The span lengths can be variant across the whole codeword by inserting dummy bits in less than all of the spans.
1. A data storage apparatus for recording data on a storage medium, the data storage apparatus comprising:
means for encoding input bits using a first error correction code to generate first redundant bits that are combined with the input bits to generate a codeword, wherein dummy bits are located among bits in the codeword;
means for encoding segments of bits in the codeword using a first component code of an error correction composite code to generate first intermediate values;
means for encoding segments of bits in the codeword that do not contain one of the dummy bits using a second component code of the error correction composite code to generate second intermediate values;
means for applying a logic function to the first and the second intermediate values to generate second redundant bits of the error correction composite code; and
means for inserting the second redundant bits into the codeword to replace the dummy bits.
2. The data storage apparatus defined in claim 1 further comprising:
means for computing final parity values for each of the segments in the codeword using the first and the second redundant bits.
3. The data storage apparatus defined in claim 1 wherein the data storage apparatus is a hard disk drive.
4. The data storage apparatus defined in claim 1 wherein the means for encoding segments of bits in the codeword using a first component code of an error correction composite code to generate the first intermediate values further comprises means for encoding segments of bits in the codeword using the first component code of the error correction composite code having a non-uniform span to generate the first intermediate values.
5. The data storage apparatus defined in claim 1 wherein the means for encoding segments of bits in the codeword using a first component code of an error correction composite code to generate the first intermediate values further comprises means for encoding segments of bits in the codeword using the first component code of a tensor product parity code to generate the first intermediate values.
6. The data storage apparatus defined in claim 1 wherein the means for encoding input bits using a first error correction code to generate first redundant bits that are combined with the input bits to generate a codeword further comprises means for encoding the input bits using a Reed-Solomon code to generate the first redundant bits.
7. The data storage apparatus defined in claim 1 wherein the means for encoding segments of bits in the codeword using a first component code of an error correction composite code to generate the first intermediate values further comprises means for encoding segments of bits in the codeword using the first component code of the error correction composite code that has parity bits stored in the same bit locations in the codeword as the dummy bits.
8. The data storage apparatus defined in claim 1 wherein the means for applying a logic function to the first and the second intermediate values to generate second redundant bits of the error correction composite code further comprises means for applying modulo 2 addition to the first and the second intermediate values to generate the second redundant bits of the error correction composite code.
9. The data storage apparatus defined in claim 1 wherein the means for encoding segments of bits in the codeword using a first component code of an error correction composite code to generate the first intermediate values further comprises means for encoding segments of bits in the codeword using a single parity code to generate the first intermediate values.
10. The data storage apparatus defined in claim 9 wherein the means for encoding segments of bits in the codeword that do not contain one of the dummy bits using a second component code of the error correction composite code to generate second intermediate values further comprises means for encoding segments of bits in the codeword that do not contain one of the dummy bits using a Bose-Chaudhuri-Hochquenghem code to generate the second intermediate values.