Write compensation circuit and signal interpolation circuit of recording device
View Patent ↗A write compensation circuit of a recording device includes a first delay portion driven by a first driving voltage, for receiving a clock signal, delaying the clock signal by a first delay time, and outputting the delayed clock signal, and a voltage supplying portion for supplying the first driving voltage to the first delay portion in such a manner that the first delay time is substantially equal to a clock period of the clock signal.
1. A signal interpolation circuit wherein a pair of input signals having different phases are split into a pair of output signals having a phase similar to that of the pair of input signals, respectively, and an output signal having a phase intermediate between the phases of the pair of output signals; and by comprising a plurality of elements, the pair of output signals and the output signal having the intermediate phase have substantially the same propagation speed,
the signal interpolation circuit further comprising:
a control section for controlling the propagation speed.
2. A signal interpolation circuit according to claim 1 , wherein the control section controls propagation speeds of input and output signals into and from each of the plurality of elements.
3. A signal interpolation circuit according to claim 1 , wherein the control section controls speeds of input and output signals into and from each of the plurality of elements.
4. A signal interpolation circuit according to claim 1 , wherein the control section adjusts propagation speeds of input and output signals into and from each of the plurality of elements in accordance with the phase difference of the pair of input signals.
5. A signal interpolation circuit according to claim 1 , wherein the control section adjusts propagation speeds of input and output signals into and from each of the plurality of elements in accordance with a change in the phase difference of the pair of input signals.