IP Library Patent Application 11202526
Patent Application
App. No. 11/202,526

Hardware checkpointing system

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Quick Facts
Patent No.
US None
App. No.
11/202,526
Abstract

A method and a system for recovering a computing system's hardware state. In one embodiment the method includes simulating a removal of a hardware device from a bus of the computing system, simulating the replacement of the hardware device onto the bus and executing a configuration program for the computing system. In another embodiment the removal of the hardware device from the bus is simulated following a detection of a fault in the computing system. In another embodiment the simulating of the removal of the hardware device from the bus includes modifying a list of hardware devices connected to the bus by removing the hardware device from the list.

Claims (29)

1 . A method for recovering a computing system's hardware state, the method comprising:

simulating a removal of a hardware device from a bus of the computing system;

simulating a replacement of the hardware device onto the bus of the computer system; and

executing a configuration program for the computing system.

2 . The method of claim 1 , wherein the removal of the hardware device from the bus is simulated following a detection of a fault at the computing system.

3 . The method of claim 1 , wherein simulating the removal of the hardware device from the bus comprises clearing bits in a command register of the hardware device.

4 . The method of claim 1 , wherein simulating the removal of the hardware device from the bus comprises modifying a list of hardware devices connected to the bus by removing the hardware device from the list.

5 . The method of claim 4 , wherein, upon the first execution of the configuration program, the configuration program deems the hardware device removed from the bus.

6 . The method of claim 5 , wherein the hardware device is deemed removed from the bus based upon a comparison between the modified list of hardware devices connected to the bus and a master list.

7 . The method of claim 1 further comprising simulating an addition of the hardware device to the bus.

8 . The method of claim 7 , wherein simulating the addition of the hardware device to the bus comprises re-initializing the hardware device.

9 . The method of claim 8 , wherein re-initializing the hardware device comprises re-setting bits in a command register of the hardware device.

10 . The method of claim 7 further comprising executing the configuration program for the computing system a second time.

11 . The method of claim 10 , wherein simulating the addition of the hardware device to the bus comprises passing a list of hardware devices connected to the bus to the configuration program in an unmodified state.

12 . The method of claim 11 , wherein, upon the second execution of the configuration program, the configuration program deems the hardware device added to the bus.

13 . The method of claim 12 , wherein the hardware device is deemed added to the bus based upon a comparison between the unmodified list of hardware devices connected to the bus and a master list.

14 . The method of claim 10 , wherein, following the second execution of the configuration program, the computing system reverts to a checkpointed state.

15 . A sub-system for recovering a computing system's hardware state, the sub-system comprising:

a plurality of hardware devices connected to a bus of the computing system;

a recovery program configured to simulate a removal of a hardware device from the bus; and

a configuration program configured to determine, upon simulation of the removal of the hardware device from the bus, that the hardware device has been removed from the bus.

16 . The sub-system of claim 15 , wherein the recovery program is further configured to simulate the removal of the hardware device from the bus following a detection of a fault at the computing system.

17 . The sub-system of claim 15 , wherein the recovery program, in simulating the removal of the hardware device from the bus, is configured to clear bits in a command register of the hardware device.

18 . The sub-system of claim 15 , wherein the configuration program deems the hardware device removed from the bus based upon a comparison between the modified list of hardware devices connected to the bus and a master list.

19 . The sub-system of claim 15 , wherein the recovery program is further configured to simulate an addition of the hardware device to the bus.

20 . The sub-system of claim 15 , wherein the recovery program, in simulating the addition of the hardware device to the bus, is configured to re-initialize the first hardware device.

21 . The sub-system of claim 20 , wherein the recovery program, in re-initializing the hardware device, is configured to re-set bits in a command register of the first hardware device.

22 . The sub-system of claim 20 , wherein the configuration program is further configured to determine, upon simulation of the addition of the hardware device to the bus, that the hardware device has been added to the bus.

23 . The sub-system of claim 22 , wherein the configuration program deems the hardware device added to the bus based upon a comparison between the unmodified list of hardware devices connected to the bus and a previous list.

Assignments (5)
RELEASE OF PATENT SECURITY AGREEMENT (SECOND LIEN) Recorded Apr 28, 2014
From: WILMINGTON TRUST NATIONAL ASSOCIATION; SUCCESSOR-IN-INTEREST TO WILMINGTON TRUST FSB AS SUCCESSOR-IN-INTEREST TO DEUTSCHE BANK TRUST COMPANY AMERICAS
To: STRATUS TECHNOLOGIES BERMUDA LTD.
Reel/Frame 032776/0536 →
RELEASE OF SECURITY INTEREST Recorded Apr 9, 2010
From: GOLDMAN SACHS CREDIT PARTNERS L.P.
To: STRATUS TECHNOLOGIES BERMUDA LTD.
Reel/Frame 024213/0375 →
PATENT SECURITY AGREEMENT (FIRST LIEN) Recorded Apr 3, 2006
From: STRATUS TECHNOLOGIES BERMUDA LTD.
To: GOLDMAN SACHS CREDIT PARTNERS L.P.
Reel/Frame 017400/0738 →
PATENT SECURITY AGREEMENT (SECOND LIEN) Recorded Apr 3, 2006
From: STRATUS TECHNOLOGIES BERMUDA LTD.
To: DEUTSCHE BANK TRUST COMPANY AMERICAS
Reel/Frame 017400/0755 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 12, 2005
From: GRAHAM, SIMON P.
To: STRATUS TECHNOLOGIES BERMUDA LTD.
Reel/Frame 016872/0549 →