IP Library Granted Patent US 7,657,589
Granted Patent B2
US 7,657,589 · App. 11/207,024 · Granted Feb 2, 2010

System and method for generating a fixed point approximation to nonlinear functions

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Quick Facts
Patent No.
US 7,657,589
App. No.
11/207,024
Granted
Feb 2, 2010
Kind
B2
Abstract

A system and method are provided for use in an electronic device configured to process data to perform a method of generating a fixed point approximation of a number x by first locating the most significant bit of a given number, then retrieving predetermined values from electronic data storage, where the first value is based on a first index value generated from the most significant bit and contains fixed-point representation located in a table in storage. Then, output values are generated from look-up tables that correspond to index values generated from a number of bits that immediately following the most significant bit. Finally, the final mathematic result is computed using fixed-point arithmetic logic to generate a fixed point approximation.

Claims (85)

1. A method of generating a fixed point approximation, comprising:

determining a value, denoted N, of the most significant bit in x to serve as an index into a table that contains fixed-point representations of x (N-fractional — bits)y , wherein the retrieved value is denoted as v 1 , and storing the value in a computer readable medium;

forming another index, denoted M, from the k o bits immediately following the most significant bit, wherein M is used as an index to address a second table that contains two output values per table entry:

v 2 =(1 +a 1 2 −1 +a 2 2 −2 + . . . +a k o 2 −k o ) y ;

and

v 3 =y/( 1 +a 1 2 −1 + . . . +a k o 2 −k o );

and storing the two values;

creating a fixed-point number from remaining bits of x if any exist that directly follow the index M;

inserting these remaining bits into the created number starting at the k o +1 fractional-bit to get a result, wherein both the integer-bits and the first k o fractional-bits of the result are all zero, and wherein the remaining bits of the result are the remaining bits of x to generate a second result v 4 , and storing the second result;

computing the final result: x y ≈v 1 ×v 2 ×[1+(v 3 ×v 4 )] using fixed-point arithmetic to generate said fixed point approximation used by an electronic device.

2. A method according to claim 1 , wherein the value of M is calculated based on bits immediately following the most significant bit.

3. A system configured to generate a fixed point approximation comprising:

a processor configured to execute code to determine the most significant bit of a number and to generate an index value based on the value of most significant bit;

a first lookup table configured to store data values of fixed-point representations of x (N-fractional — bits)y , wherein the processor is further configured to retrieve a value based on the index value to retrieve a first term, denoted as v 1 ;

a second lookup table configured to store coefficient values, wherein the processor is configured to generate a second term based on bits following the most significant bit and the (1+a 1 2 −1 +a 2 2 −2 + . . . +a k o 2 −k o ) y values are stored in the second lookup table, wherein the table has an additional output, y/(1+a 1 2 −1 + . . . +a k o 2 −k o ), used for the third term;

wherein the processor is further configured to retrieve the third term, multiplying the third term with the remaining bits of the input and adding 1 to the result to generate an intermediate term; and wherein the processor is further configured to multiply the first, second and intermediate terms together to generate a fixed point approximation used by an electronic device.

4. An electronic method of generating a fixed point approximation of a number x using a data processor device, comprising:

locating the most significant bit of x;

generating a first index value associated with the most significant bit of x;

retrieving a value from a table that contains fixed-point-representation v 1 ;

storing the value v 1 ;

generating a second index from a number of bits, k o bits, immediately following the most significant bit;

addressing a second table to retrieve two output values corresponding to the second index value;

storing the two output values as v 2 and v 3 ;

creating a fixed-point number from remaining bits of x if any exist that directly follow the k o bits;

inserting these remaining bits into the created number starting at the k o +1 fractional-bit to get a result, wherein the remaining bits of the result are the remaining bits of x to generate a second result v 4 ;

storing the second result v 4 ;

computing the final result: x y =v 1 ×v 2 ×[1+(v 3 ×v 4 )] using fixed-point arithmetic to generate a fixed point approximation used by an electronic device.

5. A method according to claim 4 , wherein the values of v 2 and v 3 are

v 2 =(1 +a 1 2 −1 +a 2 2 −2 + . . . +a k o 2 −k o ) y ;

and

v 3 =y /(1 +a 1 2 −1 + . . . +a k o 2 −k o );

respectively.

6. An electronic method of generating a fixed point approximation of a number x with an electronic data processor, comprising:

locating the most significant bit of x;

retrieving a first value from electronic data storage, where the first value is based on a first index value generated from the most significant bit and contains fixed-point representation v 1 located in a first table in storage;

retrieving two output values, v 2 and v 3 , corresponding to a second index value generated from a number of bits, k o bits, immediately following the most significant bit, where the two output values are retrieved from a second table in electronic data storage;

generating a fourth value v 4 corresponding to fractional bits following the k o bits;

computing the final result: x y ≈v 1 ×v 2 ×[1+(v 3 ×v 4 )] using fixed-point arithmetic logic to generate a fixed point approximation used by an electronic device.

7. A method according to claim 6 , further comprising:

creating a fixed-point number from remaining bits of x if any exist that directly follow the k o bits; and

inserting the fixed point number into the created number starting at the k o +1 fractional-bit to get a result, wherein the remaining bits of the result are the remaining bits of x to generate a second result v 4 .

8. An electronic method of generating a fixed point approximation of a number x with an electronic data processor, comprising:

determining a value, denoted N, of the most significant bit in x to serve as an index into a table that contains fixed-point representations of x (N-fractional — bits)y , wherein the retrieved value is denoted as v 1 , and storing the value;

forming another index, denoted M, from the k o bits immediately following the most significant bit, wherein M is used as an index to address a second table that contains two output values per table entry:

v 2 =(1 +a 1 2 −1 +a 2 2 −2 + . . . +a k o 2 −k o ) y ;

and

v 3 ′=y ×(1 +a 1 2 −1 +a 2 2 −2 + . . . +a k o 2 −k o ) y /(1 +a 1 2 −1 + . . . +a k o 2 −k o );

and storing the two values;

creating a fixed-point number from remaining bits of x if any exist that directly follow the index M;

inserting these remaining bits into the created number starting at the k o +1 fractional-bit to get a result, wherein both the integer-bits and the first k o fractional-bits of the result are all zero, and wherein the remaining bits of the result are the remaining bits of x to generate a second result v 4 , and storing the second result;

computing the final result: x y ≈v 1 ×[v 2 +(v′ 3 ×v 4 )] using fixed-point arithmetic to generate a fixed point approximation used by an electronic device.

9. A method according to claim 8 , wherein the value of M is calculated based on bits immediately following the most significant bit.

10. A system configured to generate a fixed point approximation comprising:

a processor configured to execute code to determine the most significant bit of a number and to generate an index value based on the value of most significant bit;

a first lookup table configured to store data values of fixed-point representations of x (N-fractional — bits)y , wherein the processor is further configured to retrieve a value based on the index value to retrieve a first term;

a second lookup table configured to store coefficient values, wherein the processor is configured to generate a second term based on bits following the most significant bit and the (1+a 1 2 −1 +a 2 2 −2 + . . . +a k o 2 −k o ) y values are stored in the second lookup table, wherein the table has an additional output, y×(1+a 1 2 −1 +a 2 2 −2 + . . . +a k o 2 −k o ) y /(1+a 1 2 −1 + . . . +a k o 2 −k o ), used for the third term;

wherein the processor is further configured to retrieve the third term, multiplying the third term with the remaining bits of the input and adding 1 to the result to generate an intermediate term; and

wherein the processor is further configured to multiply the first, second and intermediate terms together to generate a fixed point approximation used by an electronic device.

11. An electronic method of generating a fixed point approximation, comprising:

locating the most significant bit of x;

generating a first index value associated with the most significant bit of x;

retrieving a value from a table that contains fixed-point representation v 1 ;

storing the value v 1 ;

generating a second index from a number of bits, k o bits, immediately following the most significant bit;

addressing a second table to retrieve two output values corresponding to the second index value;

storing the two output values as v 2 and v′ 3 ;

creating a fixed-point number from remaining bits of x if any exist that directly follow the k o bits;

inserting these remaining bits into the created number starting at the k o +1 fractional-bit to get a result, wherein the remaining bits of the result are the remaining bits of x to generate a second result v 4 ;

storing the second result v 4 ;

computing the final result: x y ≈v 1 ×[v 2 +(v′ 3 ×v 4 )] using fixed-point arithmetic to generate a fixed point approximation used by an electronic device.

12. A method according to claim 11 , wherein the values of v 2 and v′ 3 are

v 2 =(1 +a 1 2 −1 +a 2 2 −2 + . . . +a k o 2 −k o ) y ;

and

v′ 3 =y ×(1 +a 1 2 −1 +a 2 2 −2 + . . . +a k o 2 −k o ) y /(1 +a 1 2 −1 + . . . +a k o 2 −k o );

respectively.

13. A electronic method of generating a fixed point approximation of a number x with a data processor, comprising:

locating the most significant bit of x;

retrieving a first value from electronic data storage, where the first value is based on a first index value generated from the most significant bit and contains fixed-point representation v 1 located in a table in storage;

retrieving two output values, v 2 and v′ 3 , corresponding to a second index value generated from a number of bits, k o bits, immediately following the most significant bit, where the two output values are retrieved from a table in electronic data storage;

generating a fourth value v 4 corresponding to fractional bits following the k o bits; and

computing the final result: x y ≈v 1 ×[v 2 +(v 3 ×v 4 )] using fixed-point arithmetic to generate a fixed point approximation used by an electronic device.

14. A method according to claim 13 , further comprising:

creating a fixed-point number from remaining bits of x if any exist that directly follow the k o bits; and

inserting the fixed point number into the created number starting at the k o +1 fractional-bit to get a result, wherein the remaining bits of the result are the remaining bits of x to generate a second result v 4 .

Assignments (14)
RELEASE OF SECURITY INTEREST Recorded Mar 4, 2023
From: EAST WEST BANK
To: GEO SEMICONDUCTOR INC.
Reel/Frame 062955/0700 →
SECURITY INTEREST Recorded Jul 26, 2022
From: GEO SEMICONDUCTOR INC.
To: EAST WEST BANK
Reel/Frame 060925/0979 →
RELEASE OF SECURITY INTEREST Recorded Jul 23, 2022
From: CRESCENT COVE CAPITAL II, LP
To: GEO SEMICONDUCTOR, INC.
Reel/Frame 060840/0079 →
RELEASE OF SECURITY INTEREST Recorded May 31, 2019
From: SCOTT LAKE HOLDINGS INC.
To: GEO SEMICONDUCTOR INC.
Reel/Frame 050340/0516 →
SECURITY INTEREST Recorded May 31, 2019
From: GEO SEMICONDUCTOR INC.
To: CRESCENT COVE CAPITAL II, LP
Reel/Frame 049337/0040 →
RELEASE OF SECURITY INTEREST Recorded May 31, 2019
From: ROADMAP GEO LP III
To: GEO SEMICONDUCTOR INC.
Reel/Frame 049334/0793 →
RELEASE OF SECURITY INTEREST Recorded May 24, 2019
From: BISHOPSGATE HOLDINGS CORPORATION
To: GEO SEMICONDUCTOR INC.
Reel/Frame 049286/0365 →
CORRECTIVE ASSIGNMENT TO CORRECT THE APPLICATION NO. FROM US12027189 TO PCTUS1227189 PREVIOUSLY RECORDED ON REEL 044958 FRAME 0828. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Mar 1, 2018
From: GEO SEMICONDUCTOR INC.
To: ROADMAP GEO LP III, AS ADMINISTRATIVE AGENT
Reel/Frame 045482/0808 →
SECURITY INTEREST Recorded Dec 26, 2017
From: GEO SEMICONDUCTOR INC.
To: ROADMAP GEO LP III, AS ADMINISTRATIVE AGENT
Reel/Frame 044958/0828 →
SECURITY INTEREST Recorded Dec 20, 2017
From: GEO SEMICONDUCTOR INC.
To: SCOTT LAKE HOLDINGS INC.
Reel/Frame 044957/0529 →
SECURITY AGREEMENT Recorded Oct 23, 2013
From: GEO SEMICONDUCTOR INC
To: BISHOPSGATE HOLDINGS CORPORATION
Reel/Frame 031479/0486 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 23, 2013
From: MAXIM INTEGRATED PRODUCTS, INC.
To: GEO SEMICONDUCTOR INC.
Reel/Frame 029677/0261 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 25, 2009
From: MOBILYGEN CORPORATION
To: MAXIM INTEGRATED PRODUCTS
Reel/Frame 023283/0101 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 17, 2005
From: VERMA, TONY S.
To: MOBILYGEN CORPORATION
Reel/Frame 016908/0976 →