IP Library Granted Patent US 7,394,608
Granted Patent B2
US 7,394,608 · App. 11/213,127 · Granted Jul 1, 2008

Read channel apparatus for asynchronous sampling and synchronous equalization

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Quick Facts
Patent No.
US 7,394,608
App. No.
11/213,127
Granted
Jul 1, 2008
Kind
B2
Abstract

A read channel and method using that read channel are disclosed. The read channel comprises an analog to digital converter which asynchronously samples at a fixed rate an analog signal formed by reading a data track, where that data track was written to a data storage medium at a symbol rate and an interpolator interconnected with the analog to digital converter. The read channel further comprises a fractionally-spaced equalizer, where the interpolator provides an interpolated signal to the fractionally-spaced equalizer at an interpolation rate, where that interpolation rate is greater than the symbol rate. The fractionally-spaced equalizer forms a synchronous equalized signal. The read channel further comprises a gain control module interconnected with the fractionally-spaced equalizer, and a sequence detector interconnected with the gain control module.

Claims (27)

1. A method to read information encoded in a data storage medium, comprising the steps of:

supplying a read channel comprising an analog to digital converter, an upsampler interconnected with said analog to digital converter, an interpolator interconnected with said upsampler, a fractionally-spaced equalizer interconnected with said interpolator, a gain control module interconnected with said fractionally-spaced equalizer, a sequence detector interconnected with said gain control module, a timing control circuit interconnected with said sequence detector and with said interpolator;

reading a data track written to a data storage medium to form an analog signal, wherein said data track comprises information encoded at a first rate;

asynchronously sampling at a fixed sampling rate said analog signal to form sampled signals;

upsampling in the asynchronous domain at an upsampling rate, wherein said upsampling rate is greater than said first rate;

forming interpolated samples;

providing said interpolated samples to said fractionally-spaced equalizer at an interpolation rate, wherein said interpolation rate is greater than said first rate;

forming synchronous, equalized samples at an equalization rate, wherein said equalization rate is less than said interpolation rate;

adjusting the gain of said equalized samples;

generating a timing signal;

providing said timing signal to said interpolator;

generating an equalizer error signal;

providing said equalizer error signal to said fractionally-spaced equalizer;

detecting data symbols representing a maximum likelihood sequence estimate using said gain-adjusted, synchronous, equalized samples,

generating signal estimates formed by decisions from said sequence detector;

wherein said generating an equalizer error signal step further comprises generating an equalizer error signal comprising the difference between said signal estimates and a delayed equalized signal, before gain control.

2. The method of claim 1 , further comprising the steps of:

generating a gain control error signal comprising the difference between a delayed gain-adjusted signal and said signal estimates;

providing said gain control error signal to said gain control module;

wherein said generating an equalizer error signal step and said generating a gain control error signal steps are decoupled.

3. The method of claim 2 , wherein said supplying a sequence detector step further comprises supplying a sequence detector comprising a target, said method further comprising the steps of:

generating an adjusted target;

providing said adjusted target to said sequence detector;

setting said target to said adjusted target.

4. The method of claim 2 , wherein said supplying a sequence detector step further comprises supplying a Partial Response Maximum Likelihood sequence detector, and wherein said detecting step further comprises detecting data symbols representing a maximum likelihood sequence estimate using said Partial Response Maximum Likelihood sequence detector.

5. The method of claim 2 , wherein said supplying a sequence detector step further comprises supplying a Noise Predictive Maximum Likelihood sequence detector, and wherein said detecting step further comprises detecting data symbols representing a maximum likelihood sequence estimate using said Noise Predictive Maximum Likelihood sequence detector.

6. The method of claim 5 , wherein said Noise Predictive Maximum Likelihood sequence detector comprises a branch metric computation algorithm and a plurality of predictor filters, wherein said predictor filters are embedded into said branch metric computation algorithm, wherein each transition of said algorithm is associated with a different one of said plurality of predictor filters.

Assignments (3)
CHANGE OF NAME Recorded Dec 20, 2021
From: FACEBOOK, INC.
To: META PLATFORMS, INC.
Reel/Frame 058553/0802 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 9, 2012
From: INTERNATIONAL BUSINESS MACHINES CORPORATION
To: FACEBOOK, INC.
Reel/Frame 028015/0181 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 3, 2005
From: ELEFTHERIOU, EVANGELOS S.; HUTCHINS, ROBERT A.; JAQUETTE, GLEN A.; JELITTO, JENS; OELCER, SEDAT
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 016617/0804 →