IP Library Granted Patent US 7,430,639
Granted Patent B1
US 7,430,639 · App. 11/213,274 · Granted Sep 30, 2008

Optimization of cascaded virtual cache memory

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Quick Facts
Patent No.
US 7,430,639
App. No.
11/213,274
Granted
Sep 30, 2008
Kind
B1
Abstract

The present invention includes storing in a main memory data block tags corresponding to blocks of data previously inserted into a buffer cache memory and then evicted from the buffer cache memory or written over in the buffer cache memory. Counters associated with the tags are updated when look-up requests to look up data block tags are received from a cache look-up algorithm.

Claims (55)

1. A method comprising:

storing a plurality of data block tags in a main memory; and

updating a plurality of counters associated with a data block tag when a look-up request for the data block tag is received from a cache look-up algorithm to look-up a data block tag;

wherein the data block tags correspond to blocks of data that were previously inserted into a buffer cache memory and then evicted from the buffer cache memory;

one of dynamically modifying a cache related algorithm stored in the main memory based on the counters, and sizing the buffer cache to an optimal size based on the counters.

2. The method of claim 1 , further comprising:

evicting the blocks of data from the buffer cache memory; and

inserting, into the memory, tags corresponding to the blocks of data evicted.

3. The method of claim 1 , wherein storing further comprising:

inserting the blocks of data into a virtual cache memory, and

not storing the blocks in the virtual cache memory.

4. The method of claim 3 , wherein the virtual cache memory has a plurality of virtual cache memory portions, and blocks of data evicted from a first one of the plurality of virtual cache memory portions are inserted into a second one of the plurality of virtual cache memory portions.

5. The method of claim 4 , wherein the virtual cache memory has a total data storage size and each portion has a size that is a fraction of the total data storage size.

6. The method of claim 1 , further comprising dynamically updating a plurality of statistics derived from the counters when the counters are updated.

7. The method of claim 1 wherein the data block tags correspond only to blocks of data previously evicted from the buffer cache.

8. The method of claim 1 further comprising storing the plurality of counters for the plurality of data block tags in a location of main memory separate from a location of main memory storing the plurality of data block tags.

9. The method of claim 1 wherein a data size of each tags is smaller than a data size of a data block tag corresponding to a block of data that is stored in the buffer cache memory.

10. The method of claim 1 further comprising accessing a block of data corresponding to the tag in a mass storage device, wherein the block of data is requested by a file system of a storage server, and each tag identifies a file system identification (FSID) number and block number for each block.

11. A storage server comprising:

a processor;

a mass storage device coupled to the processor;

a buffer cache coupled to the processor to cache data read from and written to the mass storage device;

a main memory storing a plurality of data block tags corresponding to blocks of data that were previously inserted into the buffer cache memory and then evicted from the buffer cache memory;

an operating system stored in a memory that when executed by the processor causes the processor to:

look-up a tag according to a look-up algorithm;

find the tag; and

access a block of data corresponding to the tag in the mass storage device,

wherein the data block tags are stored in a virtual cache memory, and wherein only blocks of data previously evicted from the buffer cache are inserted into a virtual cache memory, and are not stored in the virtual cache memory.

12. The storage server of claim 11 , wherein a data size of the tags is substantially less than the data storage size of the buffer cache.

13. The storage server of claim 11 , wherein a data size of each tags is smaller than a data size of a data block tag corresponding to a block of data that is stored in the buffer cache memory.

14. The storage server of claim 11 , further comprising a cache related algorithm to insert the blocks into the buffer cache, evict the blocks from the buffer cache, and insert the block into the virtual cache.

15. A storage server comprising:

a processor;

a mass storage device coupled to the processor;

a buffer cache coupled to the processor to cache data read from and written to the mass storage device;

a main memory storing a plurality of data block tags corresponding to blocks of data that were previously inserted into the buffer cache memory and then evicted from the buffer cache memory;

an operating system stored in a memory that when executed by the processor causes the processor to:

look-up a tag according to a look-up algorithm;

find the tag; and

access a block of data corresponding to the tag in the mass storage device,

wherein the operating system comprises a file system of a storage server, and each tag identifies a file system identification (FSID) number and block number for each block.

16. A machine-accessible medium containing instructions that, when executed, cause a machine to:

store a plurality of data block tags in a main memory; and

update a plurality of counters associated with a tag when a look-up request for the tag is received from a cache look-up algorithm to look-up a data block tag;

wherein the tags correspond to blocks of data that were previously inserted into a buffer cache memory and then evicted from the buffer cache memory;

one of dynamically modify a cache related algorithm stored in the main memory based on the counters, and size the buffer cache to an optimal size based on the counters.

17. The machine-accessible medium of claim 16 , wherein storing further comprises:

inserting the blocks of data into a virtual cache memory, and

not storing the blocks the virtual cache memory.

18. The machine-accessible medium of claim 17 , wherein the virtual cache memory has a plurality of virtual cache memory portions, and blocks of data evicted from a first one of the plurality of virtual cache memory portions are inserted into a second one of the plurality of virtual cache memory portions.

19. The machine-accessible medium of claim 18 further containing instructions that, when executed, cause a machine to:

combine counters associated with tags corresponding to blocks of data inserted into the portions.

20. The machine-accessible medium of claim 16 , further containing instructions that, when executed, cause a machine to:

dynamically update a plurality of statistics derived from the counters when the counters are updated.

21. The machine-accessible medium of claim 16 , wherein the instructions are a portion of an operating system that comprises a data size that is substantially less than a total data size of a main memory.

Assignments (2)
MERGER AND CHANGE OF NAME Recorded Apr 11, 2025
From: NETWORK APPLIANCE, INC.; NETAPP NC CORPORATION
To: NETAPP, INC.
Reel/Frame 071490/0528 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 26, 2005
From: BALI, NAVEEN; PATEL, NARESH
To: NETWORK APPLIANCE, INC.
Reel/Frame 016933/0609 →