Thin film transistor and manufacturing process thereof
View Patent ↗A thin film transistor including a gate, a gate insulator layer, a channel layer, a source, a drain, and an ohmic contact layer is provided. The gate insulator layer covers the gate; the channel layer is disposed on the gate insulator layer above the gate; the source and the drain are disposed on the channel layer; the ohmic contact layer is disposed between the channel layer and the source and drain. The ohmic contact layer is constituted of a plurality of film layers. As mentioned above, the thin film transistor has an ohmic contact layer constituted by a plurality of film layers. When the thin film transistor is turned off, the current leakage thereof is lowered than that of conventional thin film transistor.
1. A thin film transistor, comprising:
a gate;
a gate insulator layer, covering the gate;
a channel layer, disposed on the gate insulator layer over the gate;
a source and a drain, disposed on the channel layer; and
an ohmic contact layer, disposed between the channel layer and the source and between the channel layer and the drain, wherein the ohmic contact layer comprises a plurality of film layers, and at least an interface configured between a pair of neighboring film layers of the ohmic contact layer for impeding electron migration between the pair of neighboring film layers,
wherein the ohmic contact layer is constituted by a plurality of N-doped amorphous silicon layers.
2. The thin film transistor of claim 1 , wherein a material of the channel layer comprises amorphous silicon.
3. The thin film transistor of claim 1 , wherein a material of the gate comprises metal.
4. The thin film transistor of claim 1 , wherein a material of the source and the drain comprises metal.
5. The thin film transistor of claim 1 , wherein a material of the gate insulator layer is selected from one of silicon oxide, silicon nitride and the combination thereof.