Method and system for performing minimization of input count during structural netlist overapproximation
View Patent ↗A method for performing verification is disclosed. The method includes selecting a set of gates to add to a first localization netlist and forming a refinement netlist. A min-cut is computed with sinks having one or more gates in the refinement netlist and sources comprising one or more inputs of an original netlist and one or more registers registers of the original netlist which are not part of the refinement netlist. A final localized netlist is obtained by adding one or more gates to the refinement netlist to grow the refinement netlist until reaching one or more cut-gates of the min-cut.
1. A method for performing verification, said method comprising:
selecting a set of gates to add to a first localization netlist;
forming a refinement netlist;
computing a min-cut with sinks comprising one or more gates in said refinement netlist and sources comprising one or more inputs of an original netlist and one or more registers of said original netlist which are not part of said refinement netlist; and
obtaining a final localized netlist by adding one or more gates to said refinement netlist to grow said refinement netlist until reaching one or more cut-gates of said min-cut, and wherein said step of computing a min-cut further comprises computing a min-cut with sinks comprising one or more gates in said refinement netlist and sources comprising one or more inputs of an original netlist and one or more registers of said original netlist which are not part of refinement netlist, and wherein said step of computing said min-cut further comprises computing said min-cut to include one or more items of logic that is not combinationally driven logic and one or more gates which are sequentially driven by registers in said first localization netlist and said set of gates to add.
2. The method of claim 1 , wherein said step of forming said refinement netlist further comprises forming said refinement netlist by adding said first localization netlist and said set of gates to add to said first localization netlist.
3. The method of claim 1 , further comprising forming said first localization netlist and said set of gates to add from a set of one or more registers and one or more non-registers.
4. The method of claim 1 , wherein said step of computing said min-cut further comprises, upon determining a register to be within said first set of gates to be added, computing said min-cut on both a next state and an initial value cone of said register.
5. The method of claim 1 , further comprising iteratively applying said forming, computing, and obtaining steps in response to the detection of one or more spurious counterexamples on said final localized netlist.