Arc fault detection technique

1. Arc fault detection apparatus, comprising:

a power input configured to monitor a power line current;

a differential current input sense circuit operative to sense a differential current (di/dt) signal associated with the line current;

a differential current characteristics sense circuit operative to detect at least one characteristic of the di/dt signal,

wherein the at least one characteristic of the di/dt signal includes a level associated with a plurality of di/dt events, and a variation with time of the plurality of di/dt events over a specified number of cycles of the line current;

an absolute current input sense circuit operative to sense an absolute current signal associated with the line current;

an absolute current characteristics sense circuit operative to detect at least one characteristic of the absolute current signal,

wherein the at least one characteristic of the absolute current signal includes a peak level and an RMS level of the line current; and

a processor operative to receive representations of the at least one characteristic of the di/dt signal and the at least one characteristic of the absolute current signal, and to determine whether the characteristics of the di/dt and absolute current signals are indicative of an arc fault based on the level associated with the plurality of di/dt events, the variation with time of the plurality of di/dt events over the specified number of current cycles, and a ratio of the peak level and the RMS level of the line current.

2. The apparatus of claim 1 further including a power output and an electromechanical interface coupled between the power input and the power output, wherein the processor is further operative, in the event the characteristics of the di/dt and absolute current signals are indicative of an arc fault, to trip the electromechanical interface, thereby disconnecting the power output from a load coupleable thereto.

3. The apparatus of claim 2 wherein the electromechanical interface comprises a solenoid.

4. The apparatus of claim 1 wherein the absolute current input sense circuit includes an integrator.

5. The apparatus of claim 1 wherein the absolute current characteristics sense circuit includes circuitry selected from the group consisting of a peak detector, an RMS detector, and an average value detector.

6. The apparatus of claim 1 wherein the at least one absolute current signal characteristic is selected from the group consisting of the peak level of the line current, the RMS level of the line current, and an average value of the line current.

7. A method of detecting an arc fault, comprising the steps of:

monitoring a power line current;

sensing a differential current (di/dt) signal associated with the line current;

detecting at least one characteristic of the di/dt signal,

wherein the at least one characteristic of the di/dt signal includes a level associated with a plurality of di/dt events, and a variation with time of the plurality of di/dt events over a specified number of cycles of the line current;

sensing an absolute current signal associated with the line current;

detecting at least one characteristic of the absolute current signal,

wherein the at least one characteristic of the absolute current signal includes a peak level and an RMS level of the line current; and

in a determining step, determining whether the characteristics of the di/dt and absolute current signals are indicative of an arc fault based on the level associated with the plurality of di/dt events, the variation with time of the plurality or di/dt events over the specified number of current cycles, and a ratio of the peak level and the RMS level of the line current.

8. The method of claim 7 further including the step of, in the event the characteristics of the di/dt and absolute current signals are indicative of an arc fault, tripping an electromechanical interface to disconnect a power output from a load.

9. The method of claim 7 wherein the at least one absolute current signal characteristic is selected from the group consisting of the peak level of the line current, the RMS level of the line current, and an average value of the line current.

10. The apparatus of claim 1 wherein the processor is operative to determine an occurrence of point contact electrical arcing by detecting a specified number of high-level di/dt events having a specified large variation with time from cycle-to-cycle of the line current in association with a specified high peak-to-RMS ratio of the line current.

11. The apparatus of claim 1 wherein the processor is operative to determine an occurrence of series electrical arcing by detecting a specified number of low-level di/dt events having a specified low variation with time from cycle-to-cycle of the line current in association with a specified low peak-to-RMS ratio of the line current.

12. The method of claim 7 wherein the determining step includes determining an occurrence of point contact electrical arcing by detecting a specified number of high-level di/dt events having a specified large variation with time from cycle-to-cycle of the line current in association with a specified high peak-to-RMS ratio of the line current.

13. The method of claim 7 wherein the determining step includes determining an occurrence of series electrical arcing by detecting a specified number of low-level di/dt events having a specified low variation with time from cycle-to-cycle of the line current in association with a specified low peak-to-RMS ratio of the power line current.