IP Library Granted Patent US 7,596,144
Granted Patent B2
US 7,596,144 · App. 11/228,363 · Granted Sep 29, 2009

System-on-a-chip (SoC) device with integrated support for ethernet, TCP, iSCSI, RDMA, and network application acceleration

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Quick Facts
Patent No.
US 7,596,144
App. No.
11/228,363
Granted
Sep 29, 2009
Kind
B2
Abstract

Certain aspects of a method and system for a system-on-a-chip (SoC) device with integrated support for Ethernet, TCP, iSCSI, RDMA, and network application acceleration are provided. Aspects of the method may include storing on a multifunction host bus adapter (MHBA) chip that handles a plurality of protocols, at least a portion of received data for at least one of a plurality of network connections. The MHBA chip may be configured for handling the received data based on one of the plurality of protocols that is associated with the received data. The received data for the at least one of the plurality of network connections may be processed within the MHBA chip. The one of the plurality of protocols may include an Ethernet protocol, a transmission control protocol (TCP), an Internet protocol (IP), an Internet small computer system interface (iSCSI) protocol, and/or a remote direct memory access (RDMA) protocol.

Claims (28)

1. A method for processing network data, the method comprising:

storing on a chip that handles a plurality of protocols, at least a portion of received data for at least one of a plurality of network connections;

configuring said chip for handling said received data based on one of said plurality of protocols that is associated with said received data;

processing within said chip, said received data for said at least one of said plurality of network connections by said configured chip; and

if said received data for said at least one of said plurality of network connections utilizes a transmission control protocol (TCP), determining within said chip, a TCP session identification based on a corresponding TCP header within said received data.

2. The method according to claim 1 , comprising acquiring within said chip, TCP context information for said received data based on said located TCP session identification.

3. The method according to claim 2 , comprising processing within said chip, at least one TCP packet within said received data, based on said acquired TCP context information.

4. The method according to claim 1 , wherein said chip comprises a multifunction host bus adapter chip.

5. A method for processing network data, the method comprising:

storing on a chip that handles a plurality of protocols, at least a portion of received data for at least one of a plurality of network connections;

configuring said chip for handling said received data based on one of said plurality of protocols that is associated with said received data;

processing within said chip, said received data for said at least one of said plurality of network connections by said configured chip; and

if said received data for said at least one of said plurality of network connections is based on a RDMA protocol, removing within said chip, at least one RDMA marker from said received data.

6. The method according to claim 5 , wherein said chip comprises a multifunction host bus adapter chip.

7. A system for processing network data, the system comprising:

a chip that stores at least a portion of received data for at least one of a plurality of network connections, wherein said chip handles a plurality of protocols, and wherein said chip is configured for handling said received data based on one of said plurality of protocols that is associated with said received data; and

said chip processes said received data for said at least one of said plurality of network connections,

wherein said chip determines a TCP session identification based on a corresponding TCP header within said received data, if said received data for said at least one of said plurality of network connections utilizes a transmission control protocol (TCP).

8. The system according to claim 7 , wherein said chip acquires TCP context information for said received data based on said located TCP session identification.

9. The system according to claim 8 , wherein said chip processes at least one TCP packet within said received data, based on said acquired TCP context information.

10. A system for processing network data, the system comprising:

a chip that stores at least a portion of received data for at least one of a plurality of network connections, wherein said chip handles a plurality of protocols, and wherein said chip is configured for handling said received data based on one of said plurality of protocols that is associated with said received data; and

said chip processes said received data for said at least one of said plurality of network connections,

wherein said chip removes at least one RDMA marker from said received data, if said received data for said at least one of said plurality of network connections is based on a RDMA protocol.

11. A system for processing network data, the system comprising:

a chip that stores at least a portion of received data for at least one of a plurality of network connections, wherein said chip handles a plurality of protocols, and wherein said chip is configured for handling said received data based on one of said plurality of protocols that is associated with said received data; and

said chip processes said received data for said at least one of said plurality of network connections,

wherein said chip inserts at least one RDMA marker into data processed within said chip, if said data processed within said chip is based on a RDMA protocol.

Assignments (6)
CORRECTIVE ASSIGNMENT TO CORRECT THE EFFECTIVE DATE OF MERGER PREVIOUSLY RECORDED AT REEL: 047195 FRAME: 0827. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Nov 5, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047924/0571 →
MERGER Recorded Oct 4, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047195/0827 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: BROADCOM CORPORATION
Reel/Frame 041712/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 1, 2017
From: BROADCOM CORPORATION
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041706/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: BROADCOM CORPORATION
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037806/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 20, 2005
From: PONG, FONG
To: BROADCOM CORPORATION
Reel/Frame 016917/0705 →