IP Library Granted Patent US 7,744,291
Granted Patent B2
US 7,744,291 · App. 11/228,543 · Granted Jun 29, 2010

Early self-validation of persistent memory during boot in an optical transceiver

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Quick Facts
Patent No.
US 7,744,291
App. No.
11/228,543
Granted
Jun 29, 2010
Kind
B2
Abstract

An operational optical transceiver configured to self-validate a boot image loaded from the persistent memory early in the boot process. The optical transceiver includes a persistent memory, a controller, and a system memory. The controller initializes the boot process and begins to load information from the persistent memory to the system memory. Next, the controller detects early in the boot process boot image verification data in the information being sent to the system memory. The controller then determines if the boot image verification data has an expected value. If the verification data includes the expected value, the controller continues the boot process. If the verification data does not include the expected value, the controller will retry the boot process a predetermined number of times and will enter a default operational state if the expected value is not detected while retrying the boot process the predetermined number of times.

Claims (24)

1. An optical transceiver comprising:

an opto-electric receiver, wherein the opto-electric receiver includes:

a receiver, wherein the receiver is configured to receive a first optical data signal and convert the optical signal to a first electrical data signal; and

a post-amplifier configured to amplify the first electrical data signal;

an electro-optical transmitter, wherein the electro-optical transmitter includes:

a driver, wherein the driver is configured to receive a second electrical data signal from an external host and provide a driving signal to a transmitter; and

the transmitter, wherein the transmitter is configured to emit light in response to the driving signal;

a persistent memory, wherein the persistent memory is configured to include boot microcode, the boot microcode including:

commands that initialize the transceiver during a boot process; and

verification data;

a system memory, wherein the system memory is configured to receive the boot microcode from the persistent memory during the boot process;

a controller, wherein the controller is programmed with controller microcode configured to:

initiate a boot process to thereby begin loading the boot microcode from the persistent memory to the system memory;

detect the verification data within the boot microcode loaded from the persistent memory to the system memory while initializing the boot process; and

determine whether or not the verification data has an expected value.

2. An optical transceiver in accordance claim 1 , wherein the controller is configured to continue the boot process upon determining that the verification data does have the expected value.

3. An optical transceiver in accordance claim 1 , wherein the controller is configured to retry the boot process a predetermined number of times upon determining that the verification data does not have the expected value and to enter a default operational state if the if the verification data does not have the expected value after repeating the boot process for the predetermined number of times.

4. An optical transceiver in accordance claim 1 , wherein the verification data is loaded from the persistent memory to the system memory and detected by the controller before booting the opto-electric receiver or the electro-optical transmitter.

5. An optical transceiver in accordance claim 1 , wherein the controller is a boot controller.

6. An optical transceiver in accordance claim 1 , wherein the controller is a processor.

7. An optical transceiver in accordance with claim 1 , wherein the optical transceiver is one of a 1 G laser transceiver, a 2 G laser transceiver, a 4 G laser transceiver, a 8 G laser transceiver, or a 10 G laser transceiver.

8. An optical transceiver in accordance with claim 1 , wherein the optical transceiver is a laser transceiver configured for use in fiber optic links greater than 10 G.

9. An optical transceiver in accordance with claim 1 , wherein the optical transceiver is one of a XFP laser transceiver, a SFP laser transceiver, or a SFF laser transceiver.

10. An optical transceiver in accordance claim 1 , wherein the boot process in one of a cold boot process or a warm boot process.

Assignments (5)
PATENT RELEASE AND REASSIGNMENT Recorded Jul 5, 2022
From: BANK OF AMERICA, N.A., AS ADMINISTRATIVE AGENT
To: II-VI INCORPORATED; MARLOW INDUSTRIES, INC.; EPIWORKS, INC.; LIGHTSMYTH TECHNOLOGIES, INC.; KAILIGHT PHOTONICS, INC.; COADNA PHOTONICS, INC.; OPTIUM CORPORATION; FINISAR CORPORATION; II-VI OPTICAL SYSTEMS, INC.; M CUBED TECHNOLOGIES, INC.; II-VI PHOTONICS (US), INC.; II-VI DELAWARE, INC.; II-VI OPTOELECTRONIC DEVICES, INC.; PHOTOP TECHNOLOGIES, INC.
Reel/Frame 060574/0001 →
SECURITY INTEREST Recorded Jul 1, 2022
From: II-VI INCORPORATED; II-VI DELAWARE, INC.; M CUBED TECHNOLOGIES, INC.; II-VI PHOTONICS (US), INC.; PHOTOP TECHNOLOGIES, INC.; COHERENT, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 060562/0254 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 1, 2020
From: FINISAR CORPORATION
To: II-VI DELAWARE, INC.
Reel/Frame 052286/0001 →
NOTICE OF GRANT OF SECURITY INTEREST IN PATENTS Recorded Sep 25, 2019
From: II-VI INCORPORATED; MARLOW INDUSTRIES, INC.; EPIWORKS, INC.; LIGHTSMYTH TECHNOLOGIES, INC.; KAILIGHT PHOTONICS, INC.; COADNA PHOTONICS, INC.; OPTIUM CORPORATION; FINISAR CORPORATION; II-VI OPTICAL SYSTEMS, INC.; M CUBED TECHNOLOGIES, INC.; II-VI PHOTONICS (US), INC.; II-VI DELAWARE, INC.; II-VI OPTOELECTRONIC DEVICES, INC.; PHOTOP TECHNOLOGIES, INC.
To: BANK OF AMERICA, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 050484/0204 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 2, 2006
From: DYBSETTER, GERALD L.; HAHIN, JAYNE C.
To: FINISAR CORPORATION
Reel/Frame 017715/0608 →