IP Library Granted Patent US 7,518,431
Granted Patent B2
US 7,518,431 · App. 11/232,683 · Granted Apr 14, 2009

Semiconductor integrated circuit for processing audio and video signals

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Quick Facts
Patent No.
US 7,518,431
App. No.
11/232,683
Granted
Apr 14, 2009
Kind
B2
Abstract

A semiconductor integrated circuit includes a charge pump circuit that repeats charge and discharge of a capacitor based on a clock signal when an ON/OFF control voltage is ON; a first delay circuit that delays the ON/OFF control voltage; a switch that shorts an output of the charge pump circuit and a GND input terminal when the delayed ON/OFF control voltage is OFF and opens when the delayed ON/OFF control voltage is ON; a first circuit block that is driven by a power voltage which is supplied from a power source input terminal and the charge pump circuit; and a second circuit block that is driven by a power voltage which is supplied from the power source input terminal and the GND input terminal. The first and second circuit blocks are mounted on the same semiconductor integrated circuit chip.

Claims (16)

1. A semiconductor integrated circuit comprising:

a power source input terminal that inputs a power source voltage;

a GND input terminal that inputs a GND potential;

a control voltage input terminal that inputs an ON/OFF control voltage;

an oscillation circuit that outputs a clock signal;

a charge pump circuit that is connected to a capacitor and operates based on the ON/OFF control voltage and the clock signal, the charge pump circuit causing the capacitor to charge or discharge repeatedly based on the clock signal when the ON/OFF control voltage is ON;

a first delay circuit that delays the ON/OFF control voltage;

a switch that is connected between the charge pump circuit and the GND input terminal and operates based on the ON/OFF control voltage outputted from the first delay circuit, the switch shorting the output terminal of the charge pump circuit and the GND input terminal when the ON/OFF control voltage is OFF, and opening when the ON/OFF control voltage is ON;

a first circuit block that is driven by a power voltage which is supplied from the power source input terminal and the output terminal of the charge pump circuit; and

a second circuit block that is driven by a power voltage which is supplied from the power source input terminal and the GND input terminal;

wherein the first circuit block and the second circuit block are mounted on the same semiconductor integrated circuit chip.

2. The semiconductor integrated circuit according to claim 1 , wherein the first delay circuit is mounted on the same semiconductor integrated circuit chip on which the first circuit block and the second circuit block are mounted.

3. The semiconductor integrated circuit according to claim 1 , wherein the first circuit block processes a video signal and the second circuit block processes an audio signal.

4. The semiconductor integrated circuit according to claim 1 , further comprising a second delay circuit that delays the ON/OFF control voltage,

wherein the charge pump circuit controls output impedance based on the ON/OFF control voltage output from the second delay circuit.

5. The semiconductor integrated circuit according to claim 4 , wherein the second delay circuit is mounted on the same semiconductor integrated circuit chip on which the first circuit block and the second circuit block are mounted.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 26, 2014
From: PANASONIC CORPORATION
To: COLLABO INNOVATIONS, INC.
Reel/Frame 033021/0806 →
LIEN Recorded Jan 13, 2014
From: COLLABO INNOVATIONS, INC.
To: PANASONIC CORPORATION
Reel/Frame 031997/0445 →
CHANGE OF NAME Recorded Nov 21, 2008
From: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
To: PANASONIC CORPORATION
Reel/Frame 021897/0570 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 21, 2005
From: KOBAYASHI, TAKU; FUJII, KEIICHI
To: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
Reel/Frame 016802/0996 →