A display panel includes a transistor array substrate which has a plurality of transistors including at least a driving transistor, and a plurality of pixel electrodes electrically connected to the driving transistor of the plurality of transistors. A plurality of light-emitting layers are provided on the pixel electrodes. A counter electrode is provided on the light-emitting layers. Each of a plurality of interconnections is arranged between the pixel electrodes adjacent to each other and electrically connected to the counter electrode.
1. A display panel comprising:
a transistor array substrate which comprises a plurality of transistors, including driving transistors;
a plurality of pixel electrodes which are electrically connected to said plurality of driving transistors, said plurality of pixel electrodes being provided by patterning a transparent conductive film;
a plurality of light-emitting layers provided the pixel electrodes;
a counter electrode which is provided on the light-emitting layers;
a plurality of common interconnections, each of which is arranged between adjacent pixel electrodes and electrically connected to the counter electrode;
an insulating film provided on the transistors;
a plurality of feed interconnections, each of which is provided in a trench formed in the insulation film; and
a portion of said transparent conductive film, which has been patterned to provide the pixel electrodes, mounted on each of the feed interconnections;
wherein the pixel electrodes, the light emitting layers, and the counter electrode form a plurality of light emitting elements;
wherein the light emitting elements and the driving transistors respectively connected thereto are connected in series; and
wherein each pair of one of the light emitting elements and one of the driving transistors has a first end connected to one of the common interconnections, and a second end connected to one of the feed interconnections.
2. A panel according to claim 1 , wherein the common interconnections are arranged above the driving transistors.
3. A panel according to claim 1 , wherein the counter electrode is provided above the pixel electrodes and between adjacent pixel electrodes.
4. A panel according to claim 1 , wherein the counter electrode is formed continuously from above the pixel electrodes to above the common interconnections.
5. A panel according to claim 1 , wherein tops of the common interconnections are higher than surface levels of the light-emitting layers.
6. A panel according to claim 1 , wherein the common interconnections are thicker than the counter electrode.
7. A panel according to claim 1 , wherein the common interconnections are thicker than the pixel electrodes.
8. A panel according to claim 1 , wherein the common interconnections are thicker than source/drain electrodes and gate electrodes of said plurality of transistors.
9. A panel according to claim 1 , wherein the common interconnections are opaque.
10. A panel according to claim 1 , wherein the pixel electrodes are transparent.
11. A panel according to claim 1 , wherein said plurality of transistors include holding transistors, each of which holds a gate voltage of a corresponding one of the driving transistors in a light emission period.
12. A panel according to claim 1 , wherein said plurality of transistors include switch transistors, each of which supplies a write current to a drain-to-source path of a corresponding one of the driving transistors.
13. A panel according to claim 1 , wherein the feed interconnections extend perpendicularly to the common interconnections.
14. A panel according to claim 1 , further comprising signal lines which supply write currents to the driving transistors.
15. A panel according to claim 14 , wherein each of the signal lines is provided along one of the common interconnections without overlapping the common interconnection.
16. A panel according to claim 1 , further comprising a plurality of supply lines formed by patterning a transparent conductive film for forming sources and drains of the transistors, wherein the feed interconnections are provided on the supply lines, respectively.
17. A display panel comprising:
a transistor array substrate which comprises a plurality of transistors, including driving transistors;
a plurality of pixel electrodes which are electrically connected to the driving transistors, said plurality of pixel electrodes being provided by patterning a transparent conductive film;
a plurality of light-emitting layers provided on the pixel electrodes;
a counter electrode which is provided on the light-emitting layers;
a plurality of common interconnections, which are arranged between adjacent pixel electrodes and electrically connected to the counter electrode, and which are formed from a conductive layer different from the transparent conductive film, a layer which forms sources and drains of said plurality of transistors, and a layer which forms as gates of said plurality of transistors;
an insulating film provided on the transistors;
a plurality of feed interconnections, each of which is provided in a trench formed in the insulation film; and
a portion of said transparent conductive film, which has been patterned to provide the pixel electrodes, mounted on each of the feed interconnections;
wherein the pixel electrodes, the light emitting layers, and the counter electrode form a plurality of light emitting elements;
wherein the light emitting elements and the driving transistors respectively connected thereto are connected in series; and
wherein each pair of one of the light emitting elements and one of the driving transistors has a first end connected to one of the common interconnections, and a second end connected to one of the feed interconnections.
18. A panel according to claim 17 , further comprising a plurality of supply lines formed by patterning a transparent conductive film for forming the sources and drains of the transistors, wherein the feed interconnections are provided on the supply lines, respective.
19. A display panel comprising:
a plurality of pixel electrodes, which are provided by patterning a transparent conductive film;
a plurality of light-emitting layers which are provided on said plurality of pixel electrodes;
a counter electrode provided on each of said plurality of light-emitting layers;
a plurality of driving transistors which are electrically connected to said plurality of pixel electrodes, respectively;
a plurality of switch transistors, each of which supplies a write current to a drain-to-source path of a corresponding one of said plurality of driving transistors;
a plurality of holding transistors, each of which holds a gate voltage of a corresponding one of said plurality of driving transistors;
a plurality of common interconnections, each of which is arranged between adjacent pixel electrodes and electrically connected to the counter electrode;
a plurality of signal lines which are electrically connected to the switch transistors, and which are arranged so as not to overlap the common interconnections;
an insulating film provided on the driving transistors, the switch transistors, and the holding transistors;
a plurality of feed interconnections, each of which is provided in a trench formed in the insulation film; and
a portion of said transparent conductive film, which has been patterned to provide the pixel electrodes, mounted on each of the feed interconnections;
wherein the pixel electrodes, the light emitting layers, and the counter electrodes form a plurality of light emitting elements;
wherein the light emitting elements and the driving transistors respectively connected thereto are connected in series; and
wherein each pair of one of the light emitting elements and one of the driving transistors has a first end connected to one of the common interconnections, and a second end connected to one of the feed interconnections.
20. A panel according to claim 19 , wherein the common interconnections are formed from a conductive layer different from the transparent conductive film, a layer which forms sources and drawings of the driving transistors, and a layer which forms gates of the driving transistors.
21. A panel according to claim 19 , further comprising a plurality of supply lines formed by patterning a transparent conductive film for forming sources and drains of the transistors, wherein the feed interconnections are provided on the supply lines, respectively.