Organic light emitting diode display and manufacturing method with partition and emission regions to improve emission characteristics

1. An organic light emitting display, comprising:

a substrate;

a first electrode disposed on the substrate;

a first partition disposed on the first electrode and having an opening exposing the first electrode;

a second partition disposed an the first partition, the second partition being wider than the first partition, defining an emission area, and comprising photosensitive organic material;

an emission layer disposed in the emission area;

a charge transport layer disposed under the emission layer and including a portion positioned under the first partition; and

a second electrode disposed on the emission layer.

2. The organic light emitting display of claim 1 , wherein the charge transport layer is not thicker than the first partition.

3. The organic light emitting display of claim 1 , wherein the charge transport layer is wider than the emission area.

4. The organic light emitting display of claim 1 , wherein the first partition comprises an organic or an inorganic material.

5. The organic light emitting display of claim 1 , wherein a photosensitivity of the second partition is positive.

6. The organic light emitting display of claim 1 , further comprising:

a gate line disposed on the substrate;

a data line crossing the gate line; a first transistor coupled to the gate line and the data line;

a second transistor coupled to the first electrode; and

a voltage line coupled to the second transistor.

7. The organic light emitting display of claim 6 , wherein the first transistor and the second transistor comprise at least one of polysilicon and amorphous silicon.

8. An organic light emitting display, comprising:

a substrate;

a first electrode disposed on the substrate;

a first partition disposed on the first electrode and having an opening exposing the first electrode;

a second partition disposed on the first partition, the second partition being wider than the first partition, defining an emission area, and comprising photosensitive organic material;

an emission layer disposed in the emission area;

a charge transport layer disposed under the emission layer; and

a second electrode disposed on the emission layer, wherein a total thickness of the charge transport layer, the emission layer, and the second electrode is larger than a thickness of the first partition.

9. A method of manufacturing an organic light emitting display, the method comprising:

forming a first electrode on a substrate;

depositing an insulating layer on the first electrode;

depositing a photosensitive organic layer on the insulating layer;

light-exposing and developing the photosensitive organic layer to form an upper partition;

etching the insulating layer using the upper partition as an etch mask to form a lower partition having an opening exposing the first electrode;

forming a charge transport layer in the opening and extending at least partially under the lower partition;

forming an emission layer in the opening; and

forming a second electrode on the emission layer.

10. The method of claim 9 , wherein etching the insulating layer comprises isotropic etching.

11. The method of claim 9 , wherein the lower partition is narrower than the upper partition.

12. The method of claim 9 , wherein etching the insulating layer comprises a substantially isotropic wet etch or dry etch.

13. The method of claim 9 , wherein depositing the photosensitive organic layer comprises spin coating.

14. The method of claim 9 , wherein forming the emission layer comprises inkjet printing.

15. The method of claim 9 , further comprising:

forming the charge transport layer in the opening before forming the emission layer.

16. The method of claim 15 , wherein the charge transport layer is not thicker than the lower partition.

17. The method of claim 15 , wherein a total thickness of the charge transport layer, the emission layer, and the second electrode is larger than a thickness of the lower partition.

18. The method of claim 9 , further comprising: forming a gate line, a data line, a switching transistor, and a driving transistor before forming the first electrode.

19. The method of claim 18 , wherein the first electrode is coupled to the driving transistor.