Flexy-power amplifier: a new amplifier with built-in power management

1. A voltage amplifier, comprising:

an amplifier stage to amplify an input signal; and

a bias current generator to supply a bias current to the amplifier stage, the bias current generator controllable in response to a frame rate signal, the frame rate signal being representative of a video frame rate,

wherein a loop response of the voltage amplifier is stabilized in response to the frame rate signal.

2. The voltage amplifier of claim 1 , wherein the loop response of the voltage amplifier is stabilized with a Miller compensator.

3. The voltage amplifier of claim 2 , wherein the Miller compensator includes a controlled capacitor having a value responsive to the frame rate signal.

4. The voltage amplifier of claim 3 , wherein the Miller compensator further includes a controlled resistor having a value responsive to the frame rate signal.

5. The voltage amplifier of claim 4 , wherein the controlled resistor includes a Field Effect Transistor operated in the active region.

6. The voltage amplifier of claim 4 , wherein:

the controlled resistor includes a first combination of a first switch and a compensation resistor; and

the controlled capacitor includes a second combination of a second switch and a compensation capacitor.

7. The voltage amplifier of claim 1 , wherein the amplifier stage includes a first stage and a second stage.

8. The voltage amplifier of claim 7 , wherein the loop response of the voltage amplifier is stabilized between the first stage and the second stage.

9. A CMOS imager, comprising:

an array of CMOS active pixel sensors;

a row driver circuit to select a row of sensors in the array;

a column readout circuit to readout a column of sensors in the array; a timing and control circuit to control the row driver circuit and the column readout circuit; and

the voltage amplifier of claim 1 ,

wherein said voltage amplifier is configured to generate a voltage signal in response to an input signal.

10. The CMOS imager of claim 9 , wherein the loop response of the voltage amplifier is stabilized with a Miller compensator.

11. The CMOS imager of claim 10 , wherein the Miller compensator includes a controlled capacitor having a value responsive to the frame rate signal.

12. The CMOS imager of claim 11 , wherein the Miller compensator further includes a controlled resistor having a value responsive to the frame rate signal.

13. The CMOS imager of claim 12 , wherein:

the controlled resistor includes a first combination of a first switch and a compensation resistor; and

the controlled capacitor includes a second combination of a second switch and a compensation capacitor.

14. A voltage amplifier having a controlled output comprising:

a first stage to amplify an input signal;

a second stage coupled to an output of the first stage to generate the controlled output;

a first bias current generator to supply a first bias current to the first stage, the first bias current generator controllable in response to a frame rate signal; and

a second bias current generator to supply a second bias current to the second stage, the second bias current generator controllable in response to the frame rate signal,

wherein a loop response of the voltage amplifier is stabilized in response to the frame rate signal.

15. The voltage amplifier of claim 14 , wherein the loop response of the voltage amplifier is stabilized with a controlled capacitor having a value responsive to the frame rate signal.

16. The voltage amplifier of claim 15 , wherein the loop response of the voltage amplifier is further stabilized with a controlled resistor having a value responsive to the frame rate signal.

17. The voltage amplifier of claim 16 , wherein the controlled resistor includes a Field Effect Transistor operated in the active region.

18. The voltage amplifier of claim 16 , wherein:

the controlled resistor includes a first combination of a first switch and a compensation resistor; and

the controlled capacitor includes a second combination of a second switch and a compensation capacitor.

19. A method of generating a driver voltage for a CMOS imager, comprising:

providing an amplifier;

determining a video frame rate of the CMOS imager;

in the amplifier, generating the driver voltage as a function of an input voltage; and

controlling a bias current of the amplifier as a function of the video frame rate such that at a lower frame rate the bias current is reduced,

wherein at a lower frame rate a bandwidth of the amplifier is reduced as a function of the video frame rate.

20. The method of claim 19 , wherein as a function of the video frame rate a predetermined phase margin of the amplifier is maintained for a range of frame rates.