System and method of accessing non-volatile computer memory
View Patent ↗A system and method for organizing a non-volatile memory is provided. The system includes a non-volatile memory with a first data region and a first redundant memory area associated with the first data region. The first redundant memory area includes a first portion associated with a first data sector. The first portion of the redundant memory area includes a relative sector index and a block number. The redundant memory area also includes a second portion including error correction code (ECC) data.
1. A non-volatile computer memory comprising:
a first data region including a plurality of subregions;
a first redundant memory area associated with the first data region, the first redundant memory area including:
a first portion associated with a first of the subregions, wherein the first portion of the redundant memory area includes a relative sector index and a block number; and
a second portion including a plurality of error correction code (ECC) regions, the plurality of error correction code (ECC) regions associated with the plurality of subregions;
wherein the first portion is about 7 bytes and the second portion is about 9 bytes.
2. A non-volatile computer memory comprising:
a first data region including a plurality of subregions;
a first redundant memory area associated with the first data region, the first redundant memory area including:
a first portion associated with a first of the subregions, wherein the first portion of the redundant memory area includes a relative sector index and a block number; and
a second portion including a plurality of error correction code (ECC) regions, the plurality of error correction code (ECC) regions associated with the plurality of subregions;
a second data region;
a second redundant memory area associated with the second data region, the second redundant memory area including:
a first portion associated with a second data sector that includes a relative sector index and a block number; and
a second portion including second error correction code (ECC) data.
3. A method of reading a non-volatile computer memory, the method comprising:
reading a first portion of a redundant memory area of the non-volatile computer memory, the redundant memory area including the first portion and a second portion,
wherein the non-volatile computer memory comprises:
a first data region including a plurality of subregions;
the redundant memory area associated with the first data region, the redundant memory area including:
the first portion associated with a first of the plurality of subregions, wherein the first portion includes a relative sector index and a block number; and
the second portion including a plurality of error correction code (ECC) regions, the plurality of error correction code (ECC) regions associated with the plurality of subregions;
wherein the first portion of the redundant memory area is read without reading the second portion of the redundant memory area.
4. The method of claim 3 , wherein the first portion of the redundant memory area has a size of less than 8 bytes.
5. The method of claim 4 , wherein the first portion of the redundant memory area has a size of 7 bytes.
6. A method of performing error correction on a non-volatile computer memory, the method comprising:
reading a first portion, but not all, of a redundant memory area of a data sector of a page of the non-volatile computer memory, wherein the first portion of the redundant memory area includes a relative sector index, a block number and cyclic redundancy check data;
evaluating the cyclic redundancy check data; and
using the relative sector index and the block number to organize the page of the non-volatile computer memory in response to a determination that the cyclic redundancy check data indicates a valid condition;
wherein the non-volatile computer memory comprises:
a first data region including a plurality of subregions;
the redundant memory area associated with the first data region, the redundant memory area including:
the first portion associated with a first of the plurality of subregions; and
the second portion including a plurality of error correction code (ECC) regions, the plurality of error correction code (ECC) regions associated with the plurality of subregions.
7. The method of claim 6 , further comprising:
determining that the cyclic redundancy check data indicates an invalid condition;
reading the second portion of the redundant memory area, the second portion of the redundant memory area including error correction code (ECC) data;
performing one or more error correction operations on the page based on the ECC data; and
using the relative sector index and the block number to organize the page of the non-volatile computer memory.
8. The method of claim 6 , wherein the first portion has a size of less than 8 bytes.
9. The method of claim 6 , wherein the first portion has a size of approximately 7 bytes.
10. The method of claim 6 , wherein the second portion has a size of about 9 bytes.