IP Library Granted Patent US 7,183,129
Granted Patent B2
US 7,183,129 · App. 11/244,512 · Granted Feb 27, 2007

Method for manufacturing CMOS image sensor using spacer etching barrier film

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Quick Facts
Patent No.
US 7,183,129
App. No.
11/244,512
Granted
Feb 27, 2007
Kind
B2
Abstract

A method for fabricating a CMOS image sensor including a low voltage buried photodiode and a transfer transistor, includes the steps of: forming a field oxide for defining active area and field area on certain area of an epitaxial layer formed on a substrate, and forming a gate of transfer transistor on the epitaxial layer of the active area; forming the low voltage buried photodiode doping region in alignment with one side of the gate of transfer transistor and field oxide; forming a spacer insulation layer by stacking layers of oxide and nitride over the whole structure; forming a spacer block mask to open areas excluding doping region for the low voltage buried photodiode; and removing the spacer block mask, and forming a floating diffusion region on other side of the transfer transistor. Alternatively, the sacrificial nitride may be allowed to remain on the surface of the photodiode to improve optical properties for short wavelength lights.

Claims (25)

1. A method for fabricating a CMOS image sensor comprising a low voltage buried photodiode and a transfer translator, the method comprising:

a) forming a field oxide for defining an active area and a field area on a certain area of an epitaxial layer formed on a substrate, and forming a gate of the transfer transistor on the active layer of the epitaxial layer;

b) forming an ion implantation oxide layer on top of the epitaxial layer between the gate of the transfer transistor and the field oxide, and forming a doping region for the low voltage buried photodiode inside the epitaxial layer between the pate of the transfer transistor and the field oxide;

c) forming a sacrificial nitride layer on the whole structure resulting from part b), and forming a spacer insulation layer on the sacrificial nitride layer;

d) forming spacers on both sidewalls of the transfer transistor by blanket-etching the spacer insulation layer; and

e) removing residual sacrificial nitride from the surface of the photodiode, and forming a floating diffusion region on the other side of the transfer transistor.

2. The method for fabricating a CMOS image sensor as recited in claim 1 , wherein the ion implantation oxide layer has a thickness ranging from about 100 Å to about 600 Å, and the sacrificial nitride layer has a thickness ranging from about 100 Å to about 500 Å.

3. The method for fabricating a CMOS image sensor as recited in claim 1 , wherein the step of forming a doping region for the low voltage buried photodiode further comprises sequentially performing an n-type ion implantation and a p-type ion implantation using a mask for opening the doping region for the low voltage buried photodiode.

4. A CMOS image sensor made in accordance with the method of claim 1 .

5. A method for fabricating a CMOS image sensor comprising a low voltage buried photodiode and a transfer transistor, the method comprising:

a) forming a field oxide for defining an active area and a field area on a certain area of an epitaxial layer formed on a substrate, and forming a gate of the transfer transistor on the epitaxial layer of the active area;

b) forming a doping region for the low voltage buried photodiode inside the epitaxial layer between the gate of the transfer transistor and the field oxide;

c) forming a spacer insulation layer on the whole structure resulting from part b);

d) forming spacers on both sidewalls of the transfer transistor by blanket-etching the spacer insulation layer; and

e) forming a floating diffusion region on other side of the transfer transistor.

6. A CMOS image sensor made in accordance with the method of claim 5 .

7. A method for fabricating a CMOS image sensor comprising a low voltage burled photodiode and a transfer transistor, the method comprising:

a) forming a component insulator for defining an active area and a field area on a certain area of an epitaxial layer formed on a substrate, and forming a gate of the transfer transistor on the active layer of the epitaxial layer;

b) forming an ion implantation oxide layer on top of the epitaxial layer between the gate of the transfer transistor and the component insulator, and forming a doping region for the low voltage buried photodiode inside the epitaxial layer between the gate of the transfer transistor and the component insulator;

c) forming a sacrificial nitride layer on the whole structure resulting from part b), and forming a spacer insulation layer on the sacrificial nitride layer;

d) forming spacers on both sidewalls of the transfer transistor by blanket-etching the spacer insulation layer; and

e) removing residual sacrificial nitride from the surface of the photodiode, and forming a floating diffusion region on the other side of the transfer transistor.

8. The method for fabricating a CMOS image sensor as recited in claim 7 , wherein the ion implantation oxide layer has a thickness ranging from about 100 Å to about 500 Å and the sacrificial nitride layer has a thickness ranging from about 100 Å to about 500 Å.

9. The method for fabricating a CMOS image sensor as recited in claim 7 , wherein the step of forming a doping region for the low voltage buried photodiode further comprises sequentially performing an n-type ion implantation and a p-type ion implantation using a mask for opening the doping region for the low voltage buried photodiode.

10. A CMOS image sensor made in accordance with the method of claim 7 .

Assignments (5)
NUNC PRO TUNC ASSIGNMENT Recorded May 9, 2017
From: CARL ZEISS SMT GMBH
To: CARL ZEISS AG
Reel/Frame 042307/0072 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 28, 2017
From: INTELLECTUAL VENTURES FUND 99 LLC
To: TARSIUM B.V.
Reel/Frame 042172/0466 →
NUNC PRO TUNC ASSIGNMENT Recorded Apr 28, 2017
From: TARSIUM B.V.
To: ASML NETHERLANDS B.V.; CARL ZEISS SMT GMBH
Reel/Frame 042172/0767 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 5, 2014
From: INTELLECTUAL VENTURES II LLC
To: INTELLECTUAL VENTURES FUND 99 LLC
Reel/Frame 033039/0775 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 16, 2014
From: LEE, JU-IL
To: HYNIX SEMICONDUCTOR INC.
Reel/Frame 032683/0602 →