IP Library Granted Patent US 7,206,246
Granted Patent B2
US 7,206,246 · App. 11/249,454 · Granted Apr 17, 2007

Semiconductor memory device, refresh control method thereof, and test method thereof

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,206,246
App. No.
11/249,454
Granted
Apr 17, 2007
Kind
B2
Abstract

The present invention provides a semiconductor memory device which reduces current consumption in a standby state owing to a suitable refresh-thinning-out function, and a refresh control method thereof. When the refresh-thinning-out function is added while a refresh operation and an external access operation are being executed independently of each other, a refresh address counter outputs a refresh address Add(C) and inputs predetermined high-order bits thereof to a refresh-thinning-out control as a high-order refresh address Add(C) (m), where judgment as to whether the refresh operation is performed, is made. A refresh permission signal RFEN corresponding to the result of judgment is inputted to a word driver to activate and control the word driver. The process of judgment by the refresh-thinning-out control circuit can be embedded in an access time of a row system.

Claims (6)

1. A semiconductor memory device for sequentially selecting target word lines according to refresh request signals to thereby perform refresh operations, comprising:

a refresh-thinning-out controller section for judging whether or not the refresh operation should be executed according to each of the refresh request signals to select a refresh cycle suitable for data-holding characteristics of a memory cell connected to each of the word lines; and

a switching section for switching an active state of the refresh-thinning-out controller section under predetermined conditions;

wherein when the refresh-thinning-out controller section is defunctionalized, the switching section deactivates the refresh-thinning-out controller section.

2. The semiconductor memory device according to claim 1 , wherein the switching section includes a timer section for timing a predetermined time, and the active state of the refresh-thinning-out controller section is switched for each predetermined time.

3. The semiconductor memory device according to claim 2 , wherein the timer section includes a counter section for counting the number of occurrences of the refresh request signals.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 27, 2015
From: FUJITSU SEMICONDUCTOR LIMITED
To: SOCIONEXT INC.
Reel/Frame 035508/0337 →
CHANGE OF NAME Recorded Jul 22, 2010
From: FUJITSU MICROELECTRONICS LIMITED
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 024982/0245 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 12, 2008
From: FUJITSU LIMITED
To: FUJITSU MICROELECTRONICS LIMITED
Reel/Frame 021998/0645 →