IP Library Patent Application 11252041
Patent Application
App. No. 11/252,041

Directed auto-refresh for a dynamic random access memory

Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US None
App. No.
11/252,041
Abstract

A memory includes at least two memory banks, each memory bank including an array of memory cells including rows and columns. The memory includes a row address counter configured to provide a row address for selecting a row of memory cells for a directed auto-refresh, and a bank address counter configured to provide a bank address for selecting one of the at least two memory banks for a directed auto-refresh. The bank address counter is implemented as least significant bits of the row address counter.

Claims (55)

1 . A memory comprising:

at least two memory banks, each memory bank comprising an array of memory cells including rows and columns;

a row address counter configured to provide a row address for selecting a row of memory cells for a directed auto-refresh; and

a bank address counter configured to provide a bank address for selecting one of the at least two memory banks for a directed auto-refresh,

wherein the bank address counter is implemented as least significant bits of the row address counter.

2 . The memory of claim 1 , wherein the bank address counter is implemented as two least significant bits of the row address counter.

3 . The memory of claim 1 , wherein the bank address counter is configured to be reset in response to a directed auto-refresh mode signal.

4 . The memory of claim 1 , wherein the bank address counter is configured to be incremented in response to an auto-refresh signal.

5 . The memory of claim 1 , further comprising:

a dedicated bank address bus configured to pass the bank address for selecting one of the at least two memory banks for a directed auto-refresh.

6 . A memory comprising:

at least two memory banks, each memory bank comprising an array of memory cells including rows and columns;

a row address counter configured to provide a row address for selecting a row of memory cells for a directed auto-refresh;

a bank address counter configured to provide a bank address for selecting one of the at least two memory banks for a directed auto-refresh;

a bank address reset circuit configured to reset the bank address counter in response to a directed auto-refresh mode signal; and

a bank address counter increment circuit configured to increment the bank address counter in response to an auto-refresh signal.

7 . The memory of claim 6 , wherein the bank address counter is implemented as the least significant bits of the row address counter.

8 . The memory of claim 6 , wherein the bank address counter is configured to provide a carry-out signal to increment the row address counter.

9 . The memory of claim 6 , further comprising:

a dedicated bank address bus configured to pass the bank address for selecting one of the at least two memory banks for a directed auto-refresh.

10 . The memory of claim 6 , wherein the memory comprises a dynamic random access memory.

11 . A memory comprising:

at least two memory banks, each memory bank comprising an array of memory cells including rows and columns; and

means for auto-refreshing a row of memory cells in a first of the at least two memory banks with a second of the at least two memory banks active for access.

12 . The memory of claim 11 , wherein the means for auto-refreshing comprises:

means for resetting a bank address counter in response to entering a directed auto-refresh mode and in response to exiting a self-refresh mode;

means for incrementing the bank address counter in the directed auto-refresh mode in response to an end of an auto-refresh command;

means for selecting the first of the at least two memory banks based on a count of the bank address counter;

means for incrementing a row address counter in response to a carry-out signal from the bank address counter; and

means for selecting the row of memory cells within the first of the at least two memory banks based on a count of the row address counter.

13 . The memory of claim 11 , wherein the means for auto-refreshing comprises:

means for resetting a bank address counter in response to a directed auto-refresh mode signal;

means for passing a count of the bank address counter through a dedicated bank address counter bus to select the first of the at least two memory banks;

means for auto-refreshing the row of memory cells in the first of the at least two memory banks in response to an auto-refresh signal; and

means for incrementing the bank address counter in response to the auto-refresh signal.

14 . The memory of claim 11 , wherein the memory comprises a dynamic random access memory.

15 . A method for refreshing a memory, the method comprising:

resetting a bank address counter in response to a directed auto-refresh mode signal;

passing a count of the bank address counter through a dedicated bank address counter bus to select a first memory bank for a directed auto-refresh;

auto-refreshing a row of memory cells in the first memory bank in response to an auto-refresh signal;

incrementing the bank address counter in response to the auto-refresh signal; and

accessing a second memory bank while the first memory bank is selected for the directed auto-refresh.

16 . The method of claim 15 , wherein passing the count of the bank address counter comprises passing a two bit value of the bank address counter through a dedicated two bit bank address bus.

17 . The method of claim 15 , wherein incrementing the bank address counter comprises incrementing least significant bits of a row address counter.

18 . The method of claim 15 , wherein incrementing the bank address counter comprises incrementing two least significant bits of a row address counter.

19 . A method for refreshing a dynamic random access memory, the method comprising:

resetting a bank address counter in response to entering a directed auto-refresh mode and in response to exiting a self-refresh mode;

incrementing the bank address counter in the directed auto-refresh mode in response to an end of an auto-refresh command;

selecting a memory bank for a directed auto-refresh based on a count of the bank address counter;

incrementing a row address counter in response to a carry-out signal from the bank address counter; and

selecting a row of memory cells within the selected memory bank for an auto-refresh based on a count of the row address counter.

20 . The method of claim 19 , further comprising:

passing the count of the bank address counter through a dedicated bank address bus.

21 . The method of claim 19 , further comprising:

providing a carry-out signal from the bank address counter in response to incrementing the bank address counter to a set value.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 14, 2005
From: INFINEON TECHNOLOGIES NORTH AMERICA CORP.
To: INFINEON TECHNOLOGIES AG
Reel/Frame 016892/0310 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 7, 2005
From: FREEBERN, MARGARET CLARK
To: INFINEON TECHNOLOGIES NORTH AMERICA CORP.
Reel/Frame 016863/0781 →