Trench IGBT for highly capacitive loads
View Patent ↗An IGBT for controlling the application of power to a plasma display panel has an increased current conduction capability and a reduced conduction loss at the expense of a reduced safe operating area. For a device with a 300 volt breakdown voltage rating, the die has a substrate resistivity less than 10 m ohm cm; a buffer layer thickness of about 8 μm resistivity in the range of 0.05 to 0.10 ohm cm, and an epi layer for receiving junction patterns and trenches, which has a thickness of from 31 to 37 μm and resistivity in te range of 14 to 18 ohm cm.
1. An IGBT comprising a silicon die having a top surface and a bottom surface; said die having a P ++ substrate layer extending from said bottom surface, an N + buffer layer extending from the top of said substrate layer and an N − drift layer extending from the top of said buffer layer to said top surface; said top surface receiving a MOSgated structure and a top power electrode; a plurality of P ++ regions formed in said die and spaced apart; each of said P ++ regions connected to said top electrode; a P + termination region adjacent one of said P ++ regions and connected to said top electrode through said one of said P ++ regions; and an oxide body over said P + termination region and extending under a portion of said top electrode; said bottom surface receiving a bottom power elcctrode; said P ++ substrate having a resistivity less than about 10 ohm cm; said buffer layer having a resistivity in the range of 0.05 to 0.10 ohm cm, wherein said drift layer has a thickness in the range of 31 to 37 μm and a resistivity in the range of 14 to 18 ohm cm.
2. The IGBT of claim 1 , wherein said MOSgated structure includes a plurality of trenches and a trench topology.
3. The device of claim 2 , wherein said IGBT is a 300 volt IGBT with minimized turn-off time, maximized conduction current capability and an intentionally reduced SOA.
4. The device of claim 1 , wherein said IGBT is a 300 volt IGBT with minimized turn-off time, maximized conduction current capability and an intentionally reduced SOA.
5. The device of claim 1 , wherein said N − drift layer is epitaxially grown silicon and is targeted to a breakdown voltage of 300 volts.
6. The IGBT of claim 5 , wherein said NOSgated structure includes a plurality of trenches and a trench topology.
7. The IGBT of claim 1 , further comprising a silicon nitride layer over said portion of said top electrode.
8. The IGBT of claim 7 , further comprising a silicon layer disposed between said silicon nitride layer and said top electrode.
9. An IGBT adapted for use with a highly capacitive plasma display panel load; said IGBT comprising a silicon die having a top surface and a bottom surface; said die having a P ++ substrate layer extending from said bottom surface, an N + buffer layer extending from the top of said substrate layer and an N − drift layer extending from the top of said buffer layer to said top surface; said top surface receiving a MOSgated structure and a top power electrode; a plurality of P ++ regions formed in said die and spaced apart; each of said P ++ regions connected to said top electrode; a P ++ termination region adjacent one of said P ++ regions and connected to said top electrode through said one of said P ++ regions; and an oxide body over said P + termination region and extending under a portion of said top electrode; said bottom surface receiving a bottom power electrode; said P ++ substrate having a resistivity less than about 10 mohm cm; said buffer layer having a thickness of about 8 μm and a resistivity in the range of 0.05 to 0.10 ohm cm, wherein said drift layer has a thickness in the range of 31 to 37 μ and a resistivity in the range of 14 to 18 ohm cm.
10. The IGBT of claim 9 , wherein said MOSgated structure includes a plurality of trenches and a trench topology.
11. The device of claim 9 , wherein said IGBT is a 300 volt IGBT with minimized turnoff time, maximized conduction current capability and an intentionally reduced SOA.
12. The IGBT of claim 11 , wherein said MOSgated structure includes a plurality of trenches and a trench topology.
13. The ICBT of claim 9 , further comprising a silicon nitride layer over said portion of said top electrode.
14. The IGBT of claim 13 , further comprising a silicon layer disposed between said silicon nitride layer and said top electrode.