Multi-frequency clock stretching systems
A multi-frequency clock stretching system is provided. The multi-frequency clock stretching system includes a stretch pulse generator that generates a stretch pulse signal and a multi-frequency clock generator that produces a set of different frequency clock signals in which the clock signal pulses of the set of different frequency clock signals can be stretched as a function of the stretch pulse signal. A data processing system is also provided that includes a data processing portion and a multi-frequency clock stretching system. When the data processing portion recognizes that a clock adjustment is needed, the data processing portion provides a control signal to the multi-frequency clock stretching system that stretches the pulses of clock signals serving as inputs to the data processing portion to better align the pulses and improve system performance.
1 . A multi-frequency clock stretching system, comprising:
a stretch pulse generator that generates a stretch pulse signal; and
a multi-frequency clock generator that produces a plurality of different frequency clock signals, wherein clock signal pulses of the plurality of different frequency clock signals can be stretched as a function of the stretch pulse signal.
2 . The multi-frequency clock stretching system of claim 1 , wherein all clock signals among the plurality of different frequency clock signals are stretched as a function of the stretch pulse signal.
3 . The multi-frequency clock stretching system of claim 1 , wherein selected clock signals among the plurality of different frequency clock signals are stretched as a function of the stretch pulse signal.
4 . The multi-frequency clock stretching system of claim 1 , further comprising:
a resettable D flip-flip with input signals that include a stretch pulse signal having a pulse width and a 1 T clock, wherein internal states within the resettable D flip-flop are set to the immediate previous states for a period equal to the stretch pulse signal width.
5 . The multi-frequency clock stretching system of claim 1 , wherein the multi-frequency clock generator comprises:
a resettable D flip-flip with input signals that include a stretch pulse signal and a 1 T clock, and
wherein when the stretch pulse signal is equal to a zero, the resettable D flip-flop outputs a nT clock signal,
wherein when the stretch pulse signal is equal to a one, the resettable D flip-flop resets the nT clock signal output to the current clock nT level for a period equal to the width of the stretch pulse signal,
wherein 1 T equals a clock period of time T and nT equals a clock period that is n times the duration of the 1 T clock period.
6 . The multi-frequency clock stretching system of claim 5 , wherein n equals 2.
7 . The multi-frequency clock stretching system of claim 5 , further comprising:
a divide-by-n divider that receives the nT clock signal and generates a 2 nT clock signal; and
a divide-by-2n divider that receives the nT clock signal and generates a 4 nT clock signal.
8 . The multi-frequency clock stretching system of claim 1 , wherein said stretch pulse generator comprises:
a first digital D flip-flop that receives a stretch command signal and a master clock signal;
a second digital D flip-flop that receives an output from the first digital D flip-flop and a master clock signal;
an AND gate that receives an output from the first digital D flip-flop and an output from the second digital D flip-flop; and
a third digital D flip-flop that receives an output from the AND gate and the master clock signal and produces a stretch pulse signal.
9 . The multi-frequency clock stretching system of claim 1 , wherein said stretch pulse generator receives a stretch command signal and a master clock input signal and outputs a stretch pulse signal, and wherein the stretch command signal can be of a digital signal of any duration and the stretch pulse signal has a duration that is equal to that of the master clock period or an integer multiple of the master clock period.
10 . A data processing system, comprising:
a data processing portion;
a stretch pulse generator that generates a stretch pulse signal; and
a multi-frequency clock generator that produces a plurality of different frequency clock signals, wherein clock signal pulses of the plurality of different frequency clock signals can be stretched as a function of the stretch pulse signal, and wherein the plurality of different frequency clock signals are transmitted to the data processing portion.