Microcode configurable frequency clock
View Patent ↗A microcode configurable frequency clock that may be used to control the speed of high speed comparison in an operational optical transceiver. The frequency clock includes a memory and a logic circuit. The memory receives microcode generated data relating to the desired speed of comparison. The logic circuit is configured to receive an input clock signal and to produce an output clock signal by frequency dividing the input signal based on the microcode generated data. The output clock is used to control the speed of comparison in the optical transceiver.
1. A method for a microcode configurable frequency clock to control a comparator comprising:
an act of a memory receiving microcode generated data;
an act of a logic circuit receiving an input clock signal comprising a high pulse and a low pulse;
an act of the logic circuit frequency processing the input clock high pulse as directed by the microcode generated data to generate a high pulse of an output clock signal;
an act of the logic circuit frequency processing the input clock low pulse as directed by the microcode generated data to generate a low pulse of an output clock signal;
an act of varying high pulse widths and low pulse widths of the output clock independently as directed by the microcode generated data, the microcode generated data including a first set of bits defining the high pulse widths and a second set of bits defining the low pulse widths; and
an act of the high pulse and the low pulse of the output clock signal controlling the speed of comparison for the comparator.
2. A method in accordance claim 1 , wherein the speed of the high pulse of the output clock signal is greater than the speed of the low pulse of the output clock signal.
3. A method in accordance with claim 1 , wherein the speed of the low pulse of the output clock signal is greater than the speed of the high pulse of the output clock signal.
4. A method in accordance with claim 1 , wherein the memory is one of a register, a flip-flop, Random Access Memory (RAM), or a non-volatile memory.
5. A method in accordance with claim 1 , wherein the memory receives the microcode generated data from a microprocessor.
6. A method in accordance with claim 1 , wherein the logic circuit is a counter.
7. A method in accordance with claim 1 , wherein the microcode configurable frequency clock is implemented in an optical transceiver.